coreboot-gerrit August 2021

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Change in coreboot[master]: ADL: Update c-states in CB
by Shaik Sameeruddin (Code Review) 10 Aug '21

10 Aug '21

Shaik Sameeruddin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56890 ) Change subject: ADL: Update c-states in CB ...................................................................... ADL: Update c-states in CB Signed-off-by: sameeruddin shaik <shaik.sameeruddin(a)intel.com> Change-Id: I27e83d56ec0d251078864a20200851fbd8e1de17 --- M src/soc/intel/alderlake/acpi.c M src/soc/intel/alderlake/include/soc/cpu.h 2 files changed, 5 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/56890/1 diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c index b28ec12..27889e2 100644 --- a/src/soc/intel/alderlake/acpi.c +++ b/src/soc/intel/alderlake/acpi.c @@ -107,7 +107,8 @@ static int cstate_set_s0ix[] = { C_STATE_C1, - C_STATE_C6_LONG_LAT, + C_STATE_C6_SHORT_LAT, + C_STATE_C8, C_STATE_C10 }; diff --git a/src/soc/intel/alderlake/include/soc/cpu.h b/src/soc/intel/alderlake/include/soc/cpu.h index 71c2f47..baa3c17 100644 --- a/src/soc/intel/alderlake/include/soc/cpu.h +++ b/src/soc/intel/alderlake/include/soc/cpu.h @@ -5,11 +5,11 @@ /* Latency times in us */ #define C1_LATENCY 1 -#define C6_LATENCY 127 +#define C6_LATENCY 100 #define C7_LATENCY 253 -#define C8_LATENCY 260 +#define C8_LATENCY 250 #define C9_LATENCY 487 -#define C10_LATENCY 1048 +#define C10_LATENCY 1000 /* Power in units of mW */ #define C1_POWER 0x3e8 -- To view, visit https://review.coreboot.org/c/coreboot/+/56890 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27e83d56ec0d251078864a20200851fbd8e1de17 Gerrit-Change-Number: 56890 Gerrit-PatchSet: 1 Gerrit-Owner: Shaik Sameeruddin <shaik.sameeruddin(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/tgl: Add ucode for TGL-U and TGL-R
by Arthur Heymans (Code Review) 10 Aug '21

10 Aug '21

Attention is currently required from: Felix Singer, Tim Crawford, Tim Wawrzynczak, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56862 ) Change subject: soc/intel/tgl: Add ucode for TGL-U and TGL-R ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I210c0133dad7ade63b9f7177aaa9a69b019469af Gerrit-Change-Number: 56862 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 10 Aug 2021 06:56:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: 3rdparty/intel-microcode: Update submodule to 20210608 release
by Arthur Heymans (Code Review) 10 Aug '21

10 Aug '21

Attention is currently required from: Tim Crawford, Paul Menzel. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56861 ) Change subject: 3rdparty/intel-microcode: Update submodule to 20210608 release ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56861 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I084ba67e8eaf7383f1c05fa5589b63c92ff900b1 Gerrit-Change-Number: 56861 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 10 Aug 2021 06:55:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/storo: Fixed iasl can not run on Dut
by Paul Menzel (Code Review) 10 Aug '21

10 Aug '21

Attention is currently required from: Tao Xia. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56828 ) Change subject: mb/google/dedede/var/storo: Fixed iasl can not run on Dut ...................................................................... Patch Set 2: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56828/comment/c1f3110b_d1e1f744 PS2, Line 7: mb/google/dedede/var/storo: Fixed iasl can not run on Dut Next time, please use imperative mood and please describe the action of the change. [1]: https://chris.beams.io/posts/git-commit/ https://review.coreboot.org/c/coreboot/+/56828/comment/9ecb1104_80e75dd2 PS2, Line 9: The TSR1._PSV has been redefined. When or in what commit? https://review.coreboot.org/c/coreboot/+/56828/comment/29ad9c46_71c782af PS2, Line 10: report errors Please paste the error next time. https://review.coreboot.org/c/coreboot/+/56828/comment/dfbafbc0_4374a316 PS2, Line 11: Removing removing -- To view, visit https://review.coreboot.org/c/coreboot/+/56828 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I524255c79d3c71573d122944da5058389f79d95d Gerrit-Change-Number: 56828 Gerrit-PatchSet: 2 Gerrit-Owner: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Evan Green <evgreen(a)chromium.org> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Edward Dai <edwarddai(a)google.com> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-CC: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Attention: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 10 Aug 2021 06:55:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/system76/*: Add CMOS option table
by Arthur Heymans (Code Review) 10 Aug '21

10 Aug '21

Attention is currently required from: Tim Crawford, Jeremy Soller. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56888 ) Change subject: mb/system76/*: Add CMOS option table ...................................................................... Patch Set 1: (1 comment) File src/mainboard/system76/gaze15/cmos.layout: https://review.coreboot.org/c/coreboot/+/56888/comment/26f667f0_26234db4 PS1, Line 17: 1 0 Disable : 1 1 Enable unused? -- To view, visit https://review.coreboot.org/c/coreboot/+/56888 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie57b0e5713bba8ad46e1a4123a3ddd43e0eea964 Gerrit-Change-Number: 56888 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Comment-Date: Tue, 10 Aug 2021 06:54:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/spd_tools/lp4x: Update README
by Paul Menzel (Code Review) 10 Aug '21

10 Aug '21

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56857 ) Change subject: util/spd_tools/lp4x: Update README ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedb1ea1c3558e5f179feac2c725667db5b327b2e Gerrit-Change-Number: 56857 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Tue, 10 Aug 2021 06:52:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variants/gimble: Update GPIO for PP1800 DMIC enable
by Paul Menzel (Code Review) 10 Aug '21

10 Aug '21

Attention is currently required from: YH Lin, Tim Wawrzynczak, Paul Fagerburg, Nick Vaccaro, Mark Hsieh, Zhuohao Lee. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56889 ) Change subject: mb/google/brya/variants/gimble: Update GPIO for PP1800 DMIC enable ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/56889/comment/4e87396e_cf0cb51c PS1, Line 9: added Add -- To view, visit https://review.coreboot.org/c/coreboot/+/56889 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia0639162e2c3f02f622470fa16c21fe8a067cf7c Gerrit-Change-Number: 56889 Gerrit-PatchSet: 1 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Comment-Date: Tue, 10 Aug 2021 06:48:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp: Add support for DDR5 MR SKU
by Paul Menzel (Code Review) 10 Aug '21

10 Aug '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Meera Ravindranath, Subrata Banik. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56881 ) Change subject: mb/intel/adlrvp: Add support for DDR5 MR SKU ...................................................................... Patch Set 2: (1 comment) File src/mainboard/intel/adlrvp/spd/Makefile.inc: https://review.coreboot.org/c/coreboot/+/56881/comment/9612e13d_b01ce04d PS2, Line 9: SPD_SOURCES += adlrvp_ddr5_mr # 0b006 Please properly align the comments. -- To view, visit https://review.coreboot.org/c/coreboot/+/56881 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b7a96b5534d8b80776aa7578ce7c13181af7882 Gerrit-Change-Number: 56881 Gerrit-PatchSet: 2 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Tue, 10 Aug 2021 06:47:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp: Add support for DDR5 MR SKU
by Meera Ravindranath (Code Review) 10 Aug '21

10 Aug '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Subrata Banik. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56881 ) Change subject: mb/intel/adlrvp: Add support for DDR5 MR SKU ...................................................................... Patch Set 2: (1 comment) File src/mainboard/intel/adlrvp/romstage_fsp_params.c: https://review.coreboot.org/c/coreboot/+/56881/comment/abb9129c_737d7474 PS2, Line 63: ADL_P_DDR5_2 > does it make sense to extend the https://review.coreboot. […] Yes, I think this is a better solution. I wanted to reuse lp4_lp5 mem_spd at first but didn't assuming the board names will cause a conflict. Thanks for the suggestion. -- To view, visit https://review.coreboot.org/c/coreboot/+/56881 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b7a96b5534d8b80776aa7578ce7c13181af7882 Gerrit-Change-Number: 56881 Gerrit-PatchSet: 2 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Tue, 10 Aug 2021 05:24:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp: Add support for DDR5 MR SKU
by Subrata Banik (Code Review) 10 Aug '21

10 Aug '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Meera Ravindranath. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56881 ) Change subject: mb/intel/adlrvp: Add support for DDR5 MR SKU ...................................................................... Patch Set 2: (1 comment) File src/mainboard/intel/adlrvp/romstage_fsp_params.c: https://review.coreboot.org/c/coreboot/+/56881/comment/48ca8ef1_aa7ea708 PS2, Line 63: ADL_P_DDR5_2 > Yes, Subrata. Here is the spd hex data - […] does it make sense to extend the https://review.coreboot.org/c/coreboot/+/56881/2/src/mainboard/intel/adlrvp… itself to accommodate DRR5 there and rename it to "memory_down_spd_info" from "lp4_lp5_spd_info"(existing)and "mr_ddr5_spd_info" (newly added). Finally add ADL_P_DDR5_2 here below and call `memcfg_init` with memory_down_spd_info as argument? https://review.coreboot.org/c/coreboot/+/56881/2/src/mainboard/intel/adlrvp… Also, you could consider to change "ddr4_ddr5_spd_info" to "dimm_module_spd_info" so at high level we have only 2 types of memory topology to handle and as per board id it fall in place ? Thoughts ? -- To view, visit https://review.coreboot.org/c/coreboot/+/56881 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b7a96b5534d8b80776aa7578ce7c13181af7882 Gerrit-Change-Number: 56881 Gerrit-PatchSet: 2 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Comment-Date: Tue, 10 Aug 2021 05:15:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Meera Ravindranath <meera.ravindranath(a)intel.com> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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coreboot-gerrit August 2021