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Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56052 )
Change subject: WIP: soc/amd/common/block/lpc: Don't disable the HOG bit
......................................................................
WIP: soc/amd/common/block/lpc: Don't disable the HOG bit
This bit breaks SPI DMA.
BUG=b:179699789
TEST=Boot guybrush and see SPI DMA working
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: If015869657f36d3533f4ab9ebd1f54b0d4eb283b
---
M src/soc/amd/common/block/lpc/lpc.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/56052/1
diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c
index 2586ba9..6eb5157 100644
--- a/src/soc/amd/common/block/lpc/lpc.c
+++ b/src/soc/amd/common/block/lpc/lpc.c
@@ -66,7 +66,7 @@
* on on LPC, it holds PCI grant, so no LPC slave cycle can
* interrupt and visit LPC.
*/
- byte &= ~LPC_NOHOG;
+ // byte &= ~LPC_NOHOG;
pci_write_config8(dev, LPC_MISC_CONTROL_BITS, byte);
/*
--
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Gerrit-Change-Id: If015869657f36d3533f4ab9ebd1f54b0d4eb283b
Gerrit-Change-Number: 56052
Gerrit-PatchSet: 1
Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
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Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56051 )
Change subject: lib/prog_loaders: Add payload_preload
......................................................................
lib/prog_loaders: Add payload_preload
This method will allow the SoC code to start loading the payload before
it is required.
BUG=b:177909625
TEST=Boot guybrush and see read/decompress drop by 23 ms.
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: Ifa8f30a0f4f931ece803c2e8e022e4d33d3fe581
---
M src/include/program_loading.h
M src/include/symbols.h
M src/lib/Kconfig
M src/lib/prog_loaders.c
4 files changed, 62 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/56051/1
diff --git a/src/include/program_loading.h b/src/include/program_loading.h
index 65a36b9..dbb0ffd 100644
--- a/src/include/program_loading.h
+++ b/src/include/program_loading.h
@@ -154,6 +154,8 @@
int payload_arch_usable_ram_quirk(uint64_t start, uint64_t size);
+/* Tries to asynchronously load the payload before it is required */
+void payload_preload(void);
/* Load payload into memory in preparation to run. */
void payload_load(void);
diff --git a/src/include/symbols.h b/src/include/symbols.h
index 3e4694b..52624d4 100644
--- a/src/include/symbols.h
+++ b/src/include/symbols.h
@@ -52,6 +52,7 @@
/* Regions for execution units. */
+DECLARE_REGION(payload_preload_cache)
DECLARE_REGION(payload)
/* "program" always refers to the current execution unit. */
DECLARE_REGION(program)
diff --git a/src/lib/Kconfig b/src/lib/Kconfig
index b556f7d..3dfadaa 100644
--- a/src/lib/Kconfig
+++ b/src/lib/Kconfig
@@ -106,3 +106,19 @@
futures and poll them until completion. If this is disabled and
futures are in use, they must be polled manually.
+config HAVE_PAYLOAD_PRELOAD_CACHE
+ bool
+ select FUTURES_EXECUTOR
+ help
+ Selected by the SoC to indicate it provides the payload_preload_cache
+ region.
+
+config PAYLOAD_PRELOAD_CACHE_SIZE
+ hex
+ default 0x30000
+ depends on HAVE_PAYLOAD_PRELOAD_CACHE
+ help
+ On some systems with SPI DMA controllers, it is possible to preload
+ the payload while FSP-S is executing. This config sets the size of the
+ space in RAM allocated for the raw payload. This space is only
+ populated during non-S3, so it doesn't need to be reserved.
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 40f51eb..04faf8b 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -126,17 +126,56 @@
static struct prog global_payload =
PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/payload");
+static struct cbfs_load_async_context payload_preload_context;
+
+void payload_preload(void)
+{
+ cb_err_t err;
+ struct prog *payload = &global_payload;
+ struct cbfs_load_async_context *context = &payload_preload_context;
+
+ if (!CONFIG(HAVE_PAYLOAD_PRELOAD_CACHE))
+ return;
+
+ if (prog_locate_hook(payload))
+ return;
+
+ printk(BIOS_INFO, "Preloading payload\n");
+
+ err = cbfs_load_async(prog_name(payload), context, _payload_preload_cache,
+ REGION_SIZE(payload_preload_cache));
+
+ if (err)
+ printk(BIOS_ERR, "Preloading payload failed: %d\n", err);
+ else
+ register_future(&context->future);
+}
+
void payload_load(void)
{
struct prog *payload = &global_payload;
+ struct cbfs_load_async_context *context = &payload_preload_context;
+ void *mapping = NULL;
timestamp_add_now(TS_LOAD_PAYLOAD);
- if (prog_locate_hook(payload))
- goto out;
+ if (future_is_valid(&context->future)) {
+ wait_for_future(&context->future);
+ if (context->future.error == CB_SUCCESS) {
+ mapping = context->buffer;
+ payload->cbfs_type = context->type;
+ } else {
+ printk(BIOS_ERR, "%s: Failed to preload payload\n", __func__);
+ /* Fall through and try the synchronous route */
+ }
+ } else {
+ if (prog_locate_hook(payload))
+ goto out;
- payload->cbfs_type = CBFS_TYPE_QUERY;
- void *mapping = cbfs_type_map(prog_name(payload), NULL, &payload->cbfs_type);
+ payload->cbfs_type = CBFS_TYPE_QUERY;
+ mapping = cbfs_type_map(prog_name(payload), NULL, &payload->cbfs_type);
+ }
+
if (!mapping)
goto out;
--
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Gerrit-Change-Id: Ifa8f30a0f4f931ece803c2e8e022e4d33d3fe581
Gerrit-Change-Number: 56051
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Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>
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Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56048 )
Change subject: lib/future: Implement Futures API
......................................................................
lib/future: Implement Futures API
This is implemented in coreboot instead of commonlib because commonlib
doesn't have things like printk, die and stopwatch.
A later CL will add calls to poll_futures to hardwaremain.c.
BUG=b:177909625
TEST=boot guybrush and see payload read/decompress time drop 23ms.
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I350aebcd07024a00b90495bf937f8bca5193d02f
---
M src/lib/Kconfig
M src/lib/Makefile.inc
A src/lib/future.c
3 files changed, 134 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/56048/1
diff --git a/src/lib/Kconfig b/src/lib/Kconfig
index 239f613..b556f7d 100644
--- a/src/lib/Kconfig
+++ b/src/lib/Kconfig
@@ -98,3 +98,11 @@
the associated CAR/SRAM size. In that case every single CBFS file
lookup must re-read the same CBFS directory entries from flash to find
the respective file.
+
+config FUTURES_EXECUTOR
+ bool
+ help
+ Enables the futures executor. The executor provides means to register
+ futures and poll them until completion. If this is disabled and
+ futures are in use, they must be polled manually.
+
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index baf9c4d..0ae1304 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -271,6 +271,13 @@
ramstage-y += crc_byte.c
smm-y += crc_byte.c
+bootblock-y += future.c
+verstage-y += future.c
+romstage-y += future.c
+postcar-y += future.c
+ramstage-y += future.c
+smm-y += future.c
+
postcar-y += bootmode.c
postcar-y += boot_device.c
postcar-y += cbfs.c
diff --git a/src/lib/future.c b/src/lib/future.c
new file mode 100644
index 0000000..902f1e0
--- /dev/null
+++ b/src/lib/future.c
@@ -0,0 +1,119 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <commonlib/bsd/cb_err.h>
+#include <commonlib/bsd/future.h>
+#include <console/console.h>
+#include <stdbool.h>
+#include <timer.h>
+#include <types.h>
+
+/*
+ * This is a very trivial implementation. If we ever need a very large number of
+ * concurrent futures we can implement a better data structure.
+ */
+static struct future *futures[8];
+size_t registered_futures;
+
+void register_future(struct future *future)
+{
+ if (!CONFIG(FUTURES_EXECUTOR))
+ return;
+
+ for (size_t i = 0; i < ARRAY_SIZE(futures); ++i) {
+ if (futures[i])
+ continue;
+ futures[i] = future;
+ registered_futures++;
+
+ /*
+ * We don't poll the future since new futures should already be
+ * running.
+ */
+ return;
+ }
+ die("%s: Polling list is full\n");
+}
+
+void poll_futures(void)
+{
+ if (!CONFIG(FUTURES_EXECUTOR))
+ return;
+
+ enum future_state state;
+
+ /* Check for re-entry */
+ static bool polling = 0;
+
+ /*
+ * We shouldn't have future produces polling the global list. This
+ * can cause a circular loop. We could break the loop by removing the
+ * current future from the list before calling it, but we should just
+ * avoid this pattern.
+ */
+ if (polling)
+ die("%s: A futures produces tried to poll the global queue.");
+
+ /* Optimization so we don't always traverse the list */
+ if (!registered_futures)
+ return;
+
+ for (size_t i = 0; i < ARRAY_SIZE(futures); ++i) {
+ if (!futures[i])
+ continue;
+
+ /*
+ * We only ever perform a non-blocking poll. We leave the
+ * blocking poll for the future consumer.
+ */
+ state = futures[i]->poll(futures[i], false);
+ if (state == FUTURE_DONE) {
+ futures[i] = NULL;
+ registered_futures--;
+ }
+ }
+}
+
+static void unregister_future(struct future *future)
+{
+ if (!CONFIG(FUTURES_EXECUTOR))
+ return;
+
+ for (size_t i = 0; i < ARRAY_SIZE(futures); ++i) {
+ if (futures[i] == future) {
+ futures[i] = NULL;
+ registered_futures--;
+ return;
+ }
+ }
+}
+
+void wait_for_future(struct future *future)
+{
+ struct stopwatch sw;
+
+ stopwatch_init(&sw);
+
+ printk(BIOS_DEBUG, "waiting for future %p\n", future);
+
+ /*
+ * Unregister the current future so we don't poll it twice while
+ * busy waiting.
+ */
+ unregister_future(future);
+
+ while (future->poll(future, true) != FUTURE_DONE)
+ poll_futures();
+
+ printk(BIOS_DEBUG, " took %lu us\n", stopwatch_duration_usecs(&sw));
+}
+
+static inline enum future_state future_complete(struct future *future, bool busy_loop)
+{
+ return FUTURE_DONE;
+}
+
+void complete_future(struct future *future, cb_err_t err)
+{
+ future->error = err;
+ future->poll = future_complete;
+}
--
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Change subject: commonlib/bsd/future: Introduce future API
......................................................................
commonlib/bsd/future: Introduce future API
This CL introduces a futures API. It allows modeling asynchronous
operations. This will make it possible to model DMA transfers, I2C
transactions, EC operations, etc.
It was loosely modeled off the Rust Futures API:
https://rust-lang.github.io/async-book/02_execution/02_future.html
Since we don't use interrupts while booting, the only option we have is
to poll. For this reason I omitted the `wake` callback since there is
nothing to call it.
I evaluated the existing threads.h API and it has the following down
sides:
* Each thread requires its own stack. This means that there is a pretty
low limit to the number of concurrent async operations, and a lot of
overhead.
* There are no thread synchronization primitives (e.g., thread handles,
join, etc), so it's difficult to wait for an asynchronous operation to
complete.
* It currently only works in ramstage.
* It requires code to be reentrant since we can now have multiple
threads of executing going through the same code. This will require
adding support for mutexes to make sure critical sections are
protected. Auditing this is complicated anid error prone.
* It makes it hard to tell from looking at the code if something is
running in a different thread.
* Timestamp tracking becomes difficult because we can context switch to
a task that hogs the CPU for a while.
The futures API has the following advantages:
* We can easily scale the number of async operations since each
operation only needs to store the context to run its state machine.
* It provides a synchronization primitive so it's possible to block
until the operation is complete.
* It works in all stages.
* There is no need for mutexes since there is only 1 stack and thread of
execution.
* Async operations are explicitly modeled so it's clear if the code is
asynchronous.
* The busy_loop parameter allows putting off CPU intensive operations
until they are required. This will allow for proper timestamp
accounting.
* Creating futures that depend on other futures is pretty simple.
BUG=b:179699789
TEST=Implemented the API for rdev and cbfs, it seems pretty ergonomic
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I125a946233f122c2848704296efbcb3ca3c96079
---
A src/commonlib/bsd/include/commonlib/bsd/future.h
1 file changed, 86 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/56047/1
diff --git a/src/commonlib/bsd/include/commonlib/bsd/future.h b/src/commonlib/bsd/include/commonlib/bsd/future.h
new file mode 100644
index 0000000..1ec30c3
--- /dev/null
+++ b/src/commonlib/bsd/include/commonlib/bsd/future.h
@@ -0,0 +1,86 @@
+/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
+
+#ifndef COMMONLIB_BSD_FUTURE_H
+#define COMMONLIB_BSD_FUTURE_H
+
+#include <commonlib/bsd/cb_err.h>
+#include <stdbool.h>
+
+enum future_state {
+ FUTURE_PENDING,
+ FUTURE_IN_PROGRESS,
+ FUTURE_DONE,
+};
+
+/**
+ * A future is a representation of an asynchronous operation.
+ *
+ * e.g., Using a DMA controller to move memory, performing an I2C transaction,
+ * starting an expensive EC operation, etc
+ *
+ * An output value is omitted from this structure. If an output value is
+ * required, it is expected this structure will be embedded inside another
+ * structure that contains the output.
+ */
+struct future {
+ /**
+ * Polls the state of the future.
+ *
+ * If the future has not terminated, it will advance the state of the
+ * future's state machine as much as possible.
+ *
+ * e.g., If a DMA controller has been asked to transfer 100 KiB of data
+ * but it has a hardware limit of 64 KiB, then the transfer needs to be
+ * split up into two transactions. We need to periodically poll the
+ * hardware to check if the transaction is done. Once it has completed
+ * the second transaction can then be started. We continue to
+ * periodically poll until the second transaction completes. Once the
+ * second transaction has completed, `FUTURE_DONE` will be returned.
+ *
+ * By only polling periodically, we allow the CPU is to continue
+ * performing other work.
+ *
+ * If this function pointer is NULL, the future is uninitialized.
+ *
+ * @param busy_loop if the consumer has reached a point where it can no
+ * longer proceed without the future completing, then this value
+ * should be set to true. It is an indication to the producer that it
+ * can now perform any CPU intensive tasks (e.g., hashing,
+ * decompression, etc).
+ */
+ enum future_state (*poll)(struct future *future, bool busy_loop);
+
+ /* Status of the future once `poll` has returned `FUTURE_DONE`. */
+ enum cb_err error;
+};
+
+static inline bool future_is_valid(struct future *future)
+{
+ return !!future->poll;
+}
+
+/**
+ * Registers the future with the executor so the future's poll method will be
+ * periodically called. Once the future completes it will automatically be
+ * unregistered.
+ *
+ * You should only register top level futures. If a future has dependent futures
+ * those dependents should be polled by the containing future and not the
+ * executor.
+ */
+void register_future(struct future *future);
+
+/**
+ * Polls all the registered futures.
+ *
+ * This method should not be called by any future producers.
+ */
+void poll_futures(void);
+
+/* Wait until the future completes */
+void wait_for_future(struct future *future);
+
+/* Marks the future as complete */
+void complete_future(struct future *future, cb_err_t err);
+
+#endif /* COMMONLIB_BSD_FUTURE_H */
--
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Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55859
to look at the new patch set (#3).
Change subject: soc/amd/cezanne: Start loading APOB asynchronously while FSP-M executes
......................................................................
soc/amd/cezanne: Start loading APOB asynchronously while FSP-M executes
In the S3 resume case we will block in `soc_fill_apob_cache`
until the whole buffer has been read since the PSP has not placed
the APOB contents into RAM.
In the non-S3 case, the PSP has placed the APOB contents into RAM,
so `soc_fill_apob_cache` uses that for FSP-M. By reading the SPI
contents while FSP-M is executing, the data will be ready by the time
`soc_update_apob_cache` executes.
We currently get lucky that the APOB is only 64 KiB since the SPI DMA
controller can perform this transaction in one shot. In order to support
larger payloads, or multiple transactions while FSP-M executes, we will
need FSP-M to call `poll_futures` periodically.
BUG=b:179699789
TEST=Boot guybrush and verify APOB read timestamp has dropped from 10ms
to a few uS.
FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes)
spi_dma_readat_async: dest: 0x020935c0, offset: 0x0, size: 65536
spi_dma_async_poll: current_transaction: 0x020a3620
start_spi_dma_transaction: dest: 0x020935c0, offset: 0x0, remaining: 65536
<FSP-M executes>
wait_for_promise: waiting for promise
spi_dma_async_poll: current_transaction: 0x020a3620
continue_spi_dma_transaction: dest: 0x020935c0, offset: 0x0, remaining: 65536
spi_dma_async_poll: transaction complete
spi_dma_async_poll: current_transaction: 0x00000000
wait_for_promise: took 12 us
APOB valid copy is already in flash
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I4b5c1ef4cad571d1cbca33b1aff017a3cedc1be8
---
M src/soc/amd/cezanne/fsp_m_params.c
1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/55859/3
--
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Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55857
to look at the new patch set (#3).
Change subject: soc/amd/common/block/lpc/spi_dma: Implement readat_async
......................................................................
soc/amd/common/block/lpc/spi_dma: Implement readat_async
This change implements the region_device async readat API. The
implementation is a simple state machine that iterates over a queue
starting new transactions whenever the previous one has completed.
There is a magic bit that needs to be set for the SPI DMA controller to
function correctly. This is only available in RN/CZN+.
BUG=b:179699789
TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I0be555956581fd82bbe1482d8afa8828c61aaa00
---
M src/soc/amd/common/block/include/amdblocks/lpc.h
M src/soc/amd/common/block/lpc/spi_dma.c
2 files changed, 282 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/55857/3
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Attention is currently required from: Furquan Shaikh, Marshall Dawson, Julius Werner, Angel Pons.
Hello build bot (Jenkins), Furquan Shaikh, Marshall Dawson, Julius Werner, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55856
to look at the new patch set (#2).
Change subject: commonlib/region: Add support for asynchronous readat
......................................................................
commonlib/region: Add support for asynchronous readat
This CL adds support asynchronous readat support for region_devices.
It uses the new futures API. Asynchronous operations be be performed in
the background leaving the AP free to perform other work.
AMD SoCs have a dedicated SPI DMA controller that can be used to perform
asynchronous reads. The goal is to load certain stages, payloads, and
oproms asynchronously into a cache before the items are actually needed.
This will reduce the amount of time we spend waiting for SPI
transactions.
BUG=b:179699789
TEST=compiles
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I9702c9e6abe992ea401fa08ba71e5080c3c29d9a
---
M src/commonlib/include/commonlib/region.h
M src/commonlib/region.c
2 files changed, 50 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/55856/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9702c9e6abe992ea401fa08ba71e5080c3c29d9a
Gerrit-Change-Number: 55856
Gerrit-PatchSet: 2
Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
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Gerrit-MessageType: newpatchset
Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55858
to look at the new patch set (#3).
Change subject: soc/amd/common/apob: Add support for asynchronously reading APOB
......................................................................
soc/amd/common/apob: Add support for asynchronously reading APOB
This CL adds a method that can starts the processes of reading the APOB
from SPI. It does take more RAM in romstage since we no longer mmap the
buffer in the async happy path. This will allow us to reduce our boot
time by 10ms.
We don't register the future with the executor since it's not currently
getting called in romstage, and the transfer completes in a single
transaction.
BUG=b:179699789
TEST=With this and the FSP patch above I can see a 10 ms reduction in
boot time on guybrush.
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I930d58b76eb4558bc4f48ed928c4d6538fefbde7
---
M src/soc/amd/common/block/apob/apob_cache.c
M src/soc/amd/common/block/include/amdblocks/apob_cache.h
2 files changed, 33 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/55858/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I930d58b76eb4558bc4f48ed928c4d6538fefbde7
Gerrit-Change-Number: 55858
Gerrit-PatchSet: 3
Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
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