coreboot-gerrit July 2021

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Change in coreboot[master]: commonlib/region: Add support for asynchronous readat
by build bot (Jenkins) (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Raul Rangel, Furquan Shaikh, Marshall Dawson, Julius Werner, Angel Pons. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55856 ) Change subject: commonlib/region: Add support for asynchronous readat ...................................................................... Patch Set 3: (8 comments) File src/commonlib/include/commonlib/region.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123302): https://review.coreboot.org/c/coreboot/+/55856/comment/fe4374c9_4444f094 PS3, Line 74: cb_err_t rdev_readat_async(const struct region_device *rd, struct rdev_readat_async_context *context, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123302): https://review.coreboot.org/c/coreboot/+/55856/comment/2ce128b6_ddbdde25 PS3, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123302): https://review.coreboot.org/c/coreboot/+/55856/comment/ef3cfd8e_6c1c7699 PS3, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, function definition argument 'const struct region_device *' should also have an identifier name Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123302): https://review.coreboot.org/c/coreboot/+/55856/comment/a2b33135_fafece22 PS3, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, function definition argument 'struct rdev_readat_async_context *' should also have an identifier name Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123302): https://review.coreboot.org/c/coreboot/+/55856/comment/07982e21_4795cdb5 PS3, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, function definition argument 'void *' should also have an identifier name Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123302): https://review.coreboot.org/c/coreboot/+/55856/comment/a5473a90_cc31bc4e PS3, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, function definition argument 'size_t' should also have an identifier name Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123302): https://review.coreboot.org/c/coreboot/+/55856/comment/15c67187_b0f3d0e9 PS3, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, function definition argument 'size_t' should also have an identifier name File src/commonlib/region.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123302): https://review.coreboot.org/c/coreboot/+/55856/comment/5b6e126a_3f0ce873 PS3, Line 136: cb_err_t rdev_readat_async(const struct region_device *rd, struct rdev_readat_async_context *context, line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/55856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9702c9e6abe992ea401fa08ba71e5080c3c29d9a Gerrit-Change-Number: 55856 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 03 Jul 2021 02:25:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: WIP: soc/amd/common/block/lpc: Don't disable the HOG bit
by Raul Rangel (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56052 to look at the new patch set (#2). Change subject: WIP: soc/amd/common/block/lpc: Don't disable the HOG bit ...................................................................... WIP: soc/amd/common/block/lpc: Don't disable the HOG bit This bit breaks SPI DMA. BUG=b:179699789 TEST=Boot guybrush and see SPI DMA working Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: If015869657f36d3533f4ab9ebd1f54b0d4eb283b --- M src/soc/amd/common/block/lpc/lpc.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/56052/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56052 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If015869657f36d3533f4ab9ebd1f54b0d4eb283b Gerrit-Change-Number: 56052 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: lib/prog_loaders: Add payload_preload
by Raul Rangel (Code Review) 03 Jul '21

03 Jul '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56051 to look at the new patch set (#2). Change subject: lib/prog_loaders: Add payload_preload ...................................................................... lib/prog_loaders: Add payload_preload This method will allow the SoC code to start loading the payload before it is required. BUG=b:177909625 TEST=Boot guybrush and see read/decompress drop by 23 ms. Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: Ifa8f30a0f4f931ece803c2e8e022e4d33d3fe581 --- M src/include/program_loading.h M src/include/symbols.h M src/lib/Kconfig M src/lib/prog_loaders.c 4 files changed, 63 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/56051/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56051 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa8f30a0f4f931ece803c2e8e022e4d33d3fe581 Gerrit-Change-Number: 56051 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/{common,cezanne}: Implement HAVE_PAYLOAD_PRELOAD_CACHE
by Raul Rangel (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56053 to look at the new patch set (#2). Change subject: soc/amd/{common,cezanne}: Implement HAVE_PAYLOAD_PRELOAD_CACHE ...................................................................... soc/amd/{common,cezanne}: Implement HAVE_PAYLOAD_PRELOAD_CACHE This change allows preloading the payload. BUG=b:179699789 TEST=Boot guybrush and see payload read/decompress drop by 23 ms. Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I3ec78e628f24f2ba0c9fcf2a9e3bde64687eec44 --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/cezanne/fsp_s_params.c M src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld 3 files changed, 13 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/56053/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56053 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ec78e628f24f2ba0c9fcf2a9e3bde64687eec44 Gerrit-Change-Number: 56053 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: lib/future: Implement Futures API
by Raul Rangel (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Raul Rangel. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56048 to look at the new patch set (#2). Change subject: lib/future: Implement Futures API ...................................................................... lib/future: Implement Futures API This is implemented in coreboot instead of commonlib because commonlib doesn't have things like printk, die and stopwatch. A later CL will add calls to poll_futures to hardwaremain.c. BUG=b:177909625 TEST=boot guybrush and see payload read/decompress time drop 23ms. Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I350aebcd07024a00b90495bf937f8bca5193d02f --- M src/lib/Kconfig M src/lib/Makefile.inc A src/lib/future.c 3 files changed, 133 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/56048/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56048 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I350aebcd07024a00b90495bf937f8bca5193d02f Gerrit-Change-Number: 56048 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: commonlib/region: Add support for asynchronous readat
by build bot (Jenkins) (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Furquan Shaikh, Marshall Dawson, Julius Werner, Angel Pons. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55856 ) Change subject: commonlib/region: Add support for asynchronous readat ...................................................................... Patch Set 2: (8 comments) File src/commonlib/include/commonlib/region.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123290): https://review.coreboot.org/c/coreboot/+/55856/comment/4e0f64e6_35d0de67 PS2, Line 74: cb_err_t rdev_readat_async(const struct region_device *rd, struct rdev_readat_async_context *context, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123290): https://review.coreboot.org/c/coreboot/+/55856/comment/a8ea15a4_249f1375 PS2, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123290): https://review.coreboot.org/c/coreboot/+/55856/comment/c76efa65_10eaea8a PS2, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, function definition argument 'const struct region_device *' should also have an identifier name Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123290): https://review.coreboot.org/c/coreboot/+/55856/comment/b41e5a6a_9af5cdf2 PS2, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, function definition argument 'struct rdev_readat_async_context *' should also have an identifier name Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123290): https://review.coreboot.org/c/coreboot/+/55856/comment/3252af10_9e7a1984 PS2, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, function definition argument 'void *' should also have an identifier name Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123290): https://review.coreboot.org/c/coreboot/+/55856/comment/052f5ed8_2f052cfe PS2, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, function definition argument 'size_t' should also have an identifier name Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123290): https://review.coreboot.org/c/coreboot/+/55856/comment/7fe2bf74_7a858e35 PS2, Line 97: cb_err_t (*readat_async)(const struct region_device *, struct rdev_readat_async_context *, void *, function definition argument 'size_t' should also have an identifier name File src/commonlib/region.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123290): https://review.coreboot.org/c/coreboot/+/55856/comment/30425da7_37ff05cd PS2, Line 136: cb_err_t rdev_readat_async(const struct region_device *rd, struct rdev_readat_async_context *context, line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/55856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9702c9e6abe992ea401fa08ba71e5080c3c29d9a Gerrit-Change-Number: 55856 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Jul 2021 23:57:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/google/herobrine: Add configuration for SD card detect pin
by Shelley Chen (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Ravi kumar, Paul Menzel, mturney mturney, Julius Werner. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50584 ) Change subject: mainboard/google/herobrine: Add configuration for SD card detect pin ...................................................................... Patch Set 50: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5dc5ba10c98d606d98e7d4f4c41c3e4f45e94452 Gerrit-Change-Number: 50584 Gerrit-PatchSet: 50 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Sajida Bhanu <sbhanu(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 02 Jul 2021 23:55:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/spi: Update number of sectors details for winbond
by Shelley Chen (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Ravi kumar, Sajida Bhanu. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56038 ) Change subject: drivers/spi: Update number of sectors details for winbond ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56038 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12a22321bb9180e32cd47faa6ac3960ba5b2dfb8 Gerrit-Change-Number: 56038 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Sajida Bhanu <sbhanu(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Sajida Bhanu <sbhanu(a)codeaurora.org> Gerrit-Comment-Date: Fri, 02 Jul 2021 23:53:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc: common: gpio: Define a macro for the gpio offset
by Shelley Chen (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Ravi kumar, Taniya Das, Ravi Kumar Bokka. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55948 ) Change subject: soc: common: gpio: Define a macro for the gpio offset ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/55948/comment/5dfb61a7_222f3242 PS1, Line 7: soc: common: gpio > Ack I actually don't see this update. In general, please stick with the '/' format that was suggested instead of using the ':' formwat. -- To view, visit https://review.coreboot.org/c/coreboot/+/55948 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iefdde8f8331cf1df2e88a2c8915aefb4fa091d65 Gerrit-Change-Number: 55948 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Taniya Das <tdas(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Taniya Das <tdas(a)codeaurora.org> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 02 Jul 2021 23:39:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/{common,cezanne}: Implement HAVE_PAYLOAD_PRELOAD_CACHE
by Raul Rangel (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56053 ) Change subject: soc/amd/{common,cezanne}: Implement HAVE_PAYLOAD_PRELOAD_CACHE ...................................................................... soc/amd/{common,cezanne}: Implement HAVE_PAYLOAD_PRELOAD_CACHE This change allows preloading the payload. BUG=b:179699789 TEST=Boot guybrush and see payload read/decompress drop by 23 ms. Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I3ec78e628f24f2ba0c9fcf2a9e3bde64687eec44 --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/cezanne/fsp_s_params.c M src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld 3 files changed, 13 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/56053/1 diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 1bb9353..5712644 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -26,6 +26,7 @@ select HAVE_CF9_RESET select HAVE_EM100_SUPPORT select HAVE_FSP_GOP + select HAVE_PAYLOAD_PRELOAD_CACHE select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE select IOAPIC diff --git a/src/soc/amd/cezanne/fsp_s_params.c b/src/soc/amd/cezanne/fsp_s_params.c index ae51f92..701beae 100644 --- a/src/soc/amd/cezanne/fsp_s_params.c +++ b/src/soc/amd/cezanne/fsp_s_params.c @@ -1,7 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <fsp/api.h> +#include <acpi/acpi.h> #include <device/pci.h> +#include <fsp/api.h> +#include <program_loading.h> static void fsp_assign_vbios_upds(FSP_S_CONFIG *scfg) { @@ -13,4 +15,8 @@ FSP_S_CONFIG *scfg = &supd->FspsConfig; fsp_assign_vbios_upds(scfg); + + /* Preload the payload while FSP-S runs */ + if (!acpi_is_wakeup_s3()) + payload_preload(); } diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index e5044e6..a2133bc 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -97,6 +97,11 @@ EARLY_RESERVED_DRAM_END(.) +#if CONFIG(HAVE_PAYLOAD_PRELOAD_CACHE) + . = ALIGN(64); + REGION(payload_preload_cache, ., CONFIG_PAYLOAD_PRELOAD_CACHE_SIZE, 64) +#endif + RAMSTAGE(CONFIG_RAMBASE, 8M) } -- To view, visit https://review.coreboot.org/c/coreboot/+/56053 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ec78e628f24f2ba0c9fcf2a9e3bde64687eec44 Gerrit-Change-Number: 56053 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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coreboot-gerrit July 2021