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Change subject: mb/google/dedede: Fix the pointer/address used in memcpy
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56046/comment/11be5849_c6876072
PS2, Line 12: memcpy. This issue is caught during coverity scan CID: 1458054, 1458053.
> Please use the tag Found-by.
Done
https://review.coreboot.org/c/coreboot/+/56046/comment/dfd82bed_e98d44e1
PS2, Line 17: function.
> Were there any functional issues?
Not that I am aware of since the original CL (CB:54671) landed very recently - just couple of days back. There was a refactoring in that CL where the bug got introduced.
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Hello build bot (Jenkins), Furquan Shaikh, Martin Roth, Evan Green,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56046
to look at the new patch set (#3).
Change subject: mb/google/dedede: Fix the pointer/address used in memcpy
......................................................................
mb/google/dedede: Fix the pointer/address used in memcpy
The caller is already passing the address to the required LTE reset and
enable GPIO. During memcpy, the address to that pointer is used which
will lead to copying undefined data. Fix the pointer/address used in
memcpy.
BUG=None
BRANCH=dedede
TEST=Build Kracko, Drawcia and Metaknight mainboards which use this
function.
Change-Id: I79d6d9af03acd59ab5e1cd7df97bf451011dfeaa
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
Found-by: Coverity CID 1458053, 1458054.
---
M src/mainboard/google/dedede/variants/baseboard/ramstage.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/56046/3
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56046 )
Change subject: mb/google/dedede: Fix the pointer/address used in memcpy
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56046/comment/b926f5d0_bb892f9a
PS2, Line 12: memcpy. This issue is caught during coverity scan CID: 1458054, 1458053.
Please use the tag Found-by.
https://review.coreboot.org/c/coreboot/+/56046/comment/d3c5b357_1f1c2881
PS2, Line 17: function.
Were there any functional issues?
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Change subject: mb/google/dedede: Fix the pointer/address used in memcpy
......................................................................
Patch Set 2: Code-Review+2
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Karthik Ramasubramanian has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/56046 )
Change subject: mb/google/dedede: Fix the pointer/address used in memcpy
......................................................................
mb/google/dedede: Fix the pointer/address used in memcpy
The caller is already passing the address to the required LTE reset and
enable GPIO. During memcpy, the address to that pointer is used which
will lead to copying undefined data. Fix the pointer/address used in
memcpy. This issue is caught during coverity scan CID: 1458054, 1458053.
BUG=None
BRANCH=dedede
TEST=Build Kracko, Drawcia and Metaknight mainboards which use this
function.
Change-Id: I79d6d9af03acd59ab5e1cd7df97bf451011dfeaa
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
---
M src/mainboard/google/dedede/variants/baseboard/ramstage.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/56046/2
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Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56046 )
Change subject: mb/google/dedede: Fix the pointer/address used in memcpy
......................................................................
mb/google/dedede: Fix the pointer/address used in memcpy
The caller is already passing the address to the required LTE reset and
enable GPIO. During memcpy, the address to that pointer is used which
will lead to copying undefined data. Fix the pointer/address used in
memcpy.
BUG=None
TEST=Build Kracko, Drawcia and Metaknight mainboards which use this
function.
Change-Id: I79d6d9af03acd59ab5e1cd7df97bf451011dfeaa
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
---
M src/mainboard/google/dedede/variants/baseboard/ramstage.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/56046/1
diff --git a/src/mainboard/google/dedede/variants/baseboard/ramstage.c b/src/mainboard/google/dedede/variants/baseboard/ramstage.c
index 136fe13..aedaa3f 100644
--- a/src/mainboard/google/dedede/variants/baseboard/ramstage.c
+++ b/src/mainboard/google/dedede/variants/baseboard/ramstage.c
@@ -35,10 +35,10 @@
config->type = UPC_TYPE_INTERNAL;
if (port->path.usb.port_type == LTE_USB_PORT_TYPE) {
config->has_power_resource = 1;
- memcpy(&config->reset_gpio, <e_reset_gpio,
+ memcpy(&config->reset_gpio, lte_reset_gpio,
sizeof(config->reset_gpio));
config->reset_off_delay_ms = 20;
- memcpy(&config->enable_gpio, <e_enable_gpio,
+ memcpy(&config->enable_gpio, lte_enable_gpio,
sizeof(config->enable_gpio));
config->enable_delay_ms = 20;
}
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56025 )
Change subject: drivers/intel/usb4/retimer: remove redundant member PLD
......................................................................
Patch Set 5:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56025/comment/759275f6_85f37429
PS5, Line 9: We
we
https://review.coreboot.org/c/coreboot/+/56025/comment/df9932a2_262daddd
PS5, Line 10: removing
remove
https://review.coreboot.org/c/coreboot/+/56025/comment/a7ae578c_7ade56c3
PS5, Line 10: and devicetree need not fill PLD structure now
… so the devicetree does not need to fill the PLD structure anymore.
https://review.coreboot.org/c/coreboot/+/56025/comment/f44f5f33_b03c3aba
PS5, Line 11: redundant
obsolete
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56026 )
Change subject: soc/intel/alderlake: Add GFx Device ID 0x46a6
......................................................................
Patch Set 1:
(1 comment)
File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/56026/comment/95ff6179_dd71bc71
PS1, Line 3821: #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6
Please sort by the id.
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