coreboot-gerrit July 2021

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Change in coreboot[master]: mb/adlrvp: Fix DDR5 Boot issue
by Meera Ravindranath (Code Review) 08 Jul '21

08 Jul '21

Attention is currently required from: Bora Guvendik, Furquan Shaikh, Selma Bensaid, Maulik V Vaghela, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Angel Pons, Patrick Rudolph. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50996 ) Change subject: mb/adlrvp: Fix DDR5 Boot issue ...................................................................... Patch Set 18: (7 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/50996/comment/9274f720_1fed138a PS14, Line 9: The coreboot SMBus driver requires additional changes > please use col 72 ? Done File src/mainboard/intel/adlrvp/romstage_fsp_params.c: https://review.coreboot.org/c/coreboot/+/50996/comment/3b857bcc_43394a58 PS14, Line 55: memcfg_init(m_cfg, mem_config, &ddr4_ddr5_spd_info, half_populated); : break; > isn't this is same as line 59-60 below ? Ack File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/50996/comment/f4d8017f_2370217b PS14, Line 222: > tab please ? Done https://review.coreboot.org/c/coreboot/+/50996/comment/c1602b86_98142131 PS14, Line 225: 16 > sizeof(spd_array) ? Done https://review.coreboot.org/c/coreboot/+/50996/comment/1497437c_ddeedb62 PS14, Line 266: > tab please ? Done File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/50996/comment/fe3acafd_95699359 PS17, Line 222: static > you don't need static here. Done https://review.coreboot.org/c/coreboot/+/50996/comment/544c65a1_7e358897 PS17, Line 271: mem_init_dq_upds(mem_cfg, &data, mb_cfg, dq_dqs_auto_detect); : mem_init_dqs_upds(mem_cfg, &data, mb_cfg, dq_dqs_auto_detect); > shouldn't this resides outside the loop ? we want to fill dq/dqs irrespective of you are passing the […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/50996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a Gerrit-Change-Number: 50996 Gerrit-PatchSet: 18 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 08 Jul 2021 08:38:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/adlrvp: Fix DDR5 Boot issue
by build bot (Jenkins) (Code Review) 08 Jul '21

08 Jul '21

Attention is currently required from: Bora Guvendik, Furquan Shaikh, Selma Bensaid, Maulik V Vaghela, Tim Wawrzynczak, Paul Menzel, Angel Pons, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50996 ) Change subject: mb/adlrvp: Fix DDR5 Boot issue ...................................................................... Patch Set 18: (1 comment) File src/soc/intel/alderlake/meminit.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123637): https://review.coreboot.org/c/coreboot/+/50996/comment/e499c8ea_4c98f9aa PS18, Line 276: else else should follow close brace '}' -- To view, visit https://review.coreboot.org/c/coreboot/+/50996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a Gerrit-Change-Number: 50996 Gerrit-PatchSet: 18 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 08 Jul 2021 08:37:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/adlrvp: Fix DDR5 Boot issue
by Meera Ravindranath (Code Review) 08 Jul '21

08 Jul '21

Attention is currently required from: Bora Guvendik, Furquan Shaikh, Selma Bensaid, Maulik V Vaghela, Tim Wawrzynczak, Paul Menzel, Meera Ravindranath, Angel Pons, Patrick Rudolph. Hello Bora Guvendik, build bot (Jenkins), Furquan Shaikh, Selma Bensaid, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50996 to look at the new patch set (#18). Change subject: mb/adlrvp: Fix DDR5 Boot issue ...................................................................... mb/adlrvp: Fix DDR5 Boot issue The coreboot SMBus driver requires additional changes to accomodate the DDR5 EEPROM read which has resulted in a broken code flow for boot. This CL serves as a temp WA to let FSP perform the SPD read for DDR5 and pass SPD addresses to FSP UPD array. BUG=b:180458099 TEST=Build and boot DDR5 adlrvp to OS Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a --- M src/soc/intel/alderlake/meminit.c 1 file changed, 27 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/50996/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/50996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a Gerrit-Change-Number: 50996 Gerrit-PatchSet: 18 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: vc/mediatek/mt8195: add FOR_COREBOOT define
by Hung-Te Lin (Code Review) 08 Jul '21

08 Jul '21

Attention is currently required from: Rex-BC Chen, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56158 ) Change subject: vc/mediatek/mt8195: add FOR_COREBOOT define ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: I think you should also change the `#elif CONFIG(CHROMEOS)` to `#elif defined(FOR_COREBOOT)` in this change, so it's for 'Replace CONFIG(CHROMEOS) by the definition FOR_COREBOOT' -- To view, visit https://review.coreboot.org/c/coreboot/+/56158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic7a6e24f41c1fda167b5d6bb2d8a2c5c79dda8de Gerrit-Change-Number: 56158 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 08 Jul 2021 08:36:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/adlrvp: Fix DDR5 Boot issue
by Subrata Banik (Code Review) 08 Jul '21

08 Jul '21

Attention is currently required from: Bora Guvendik, Furquan Shaikh, Selma Bensaid, Maulik V Vaghela, Tim Wawrzynczak, Paul Menzel, Meera Ravindranath, Angel Pons, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50996 ) Change subject: mb/adlrvp: Fix DDR5 Boot issue ...................................................................... Patch Set 17: (3 comments) File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/50996/comment/a2e9e417_bf8b232a PS17, Line 222: { will this is more readable const int spd_array[] = { 0xA0, 0xA2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xA4, 0xA6, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }; or #define MAX_SPD_ADDRESS_TABLE_ELEMENT 0x10 static void mem_init_smbus_fill_upd(FSP_M_CONFIG *mem_cfg) static const int spd_array[MAX_SPD_ADDRESS_TABLE_ELEMENT] = { [0] = 0xA0, [1] = 0xA2, [8] = 0xA4, [9] = 0xA6, }; for (int i = 0; i < MAX_SPD_ADDRESS_TABLE_ELEMENT; i++) mem_cfg->SpdAddressTable[i] = spd_array[i]; } I personally prefer the later one https://review.coreboot.org/c/coreboot/+/50996/comment/50bbbcf6_9e71d8c4 PS17, Line 222: static you don't need static here. https://review.coreboot.org/c/coreboot/+/50996/comment/a5e201dc_816f6f40 PS17, Line 271: mem_init_dq_upds(mem_cfg, &data, mb_cfg, dq_dqs_auto_detect); : mem_init_dqs_upds(mem_cfg, &data, mb_cfg, dq_dqs_auto_detect); shouldn't this resides outside the loop ? we want to fill dq/dqs irrespective of you are passing the SMBUS address or SPD pointer directly to SPD ? -- To view, visit https://review.coreboot.org/c/coreboot/+/50996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a Gerrit-Change-Number: 50996 Gerrit-PatchSet: 17 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 08 Jul 2021 07:55:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/Intel/ Documentation/mainboard/kontron/ Documentation/m...
by Jose S. Cofreros Jr. (Code Review) 08 Jul '21

08 Jul '21

Attention is currently required from: Paul Menzel. Jose S. Cofreros Jr. has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56150 ) Change subject: Documentation/Intel/ Documentation/mainboard/kontron/ Documentation/mainboard/purism/: Change capitalized coreboot to Coreboot ...................................................................... Patch Set 2: (3 comments) Patchset: PS2: Hi Paul. Good day. Thanks for the quick reply. I will use lowercase coreboot instead. All instances of Coreboot* were being reported as error by lint when I try to commit my other patch. These files were not part of my intended modification and they just failed in lint. That is my reason for this patch. With best regards, Josh File Documentation/Intel/development.html: https://review.coreboot.org/c/coreboot/+/56150/comment/b25b92d9_9a58f6ac PS2, Line 153: C > Why use the HTML encoding(?)? Thanks for the quick reply. I thought that it will be better in that format and was part of a link/phrase. I will use the lowercase coreboot instead. I need to submit this patch as this was blocking my other patch to change one GPIO setting for Leaf Hill. File Documentation/mainboard/purism/librem_mini.md: https://review.coreboot.org/c/coreboot/+/56150/comment/e52fdac6_1f7a23e3 PS2, Line 110: CorebootPayloadPkg > I believe this is the official spelling for the package. Thanks for the quick reply. I was about to update the patch. I will update the patch with the lowercase coreboot. lint-stable-021-coreboot-lowercase is blocking my other Leaf Hill patch so I am trying to fix the capitalized coreboot error. All instances with Coreboot* are being treated as error in lint. -- To view, visit https://review.coreboot.org/c/coreboot/+/56150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab265fa7fee5018a2ad8cafa0133f37a2a4e3737 Gerrit-Change-Number: 56150 Gerrit-PatchSet: 2 Gerrit-Owner: Jose S. Cofreros Jr. <jose.sx.cofreros.jr(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 08 Jul 2021 07:54:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings
by Rex-BC Chen (Code Review) 08 Jul '21

08 Jul '21

Attention is currently required from: Paul Menzel, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56106 ) Change subject: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56106/comment/0d587895_1ac2179f PS5, Line 8: > The macros should be renamed in a separate change-set/commit. makefile move to https://review.coreboot.org/c/coreboot/+/56158 File src/vendorcode/mediatek/mt8195/Makefile.inc: https://review.coreboot.org/c/coreboot/+/56106/comment/14cda938_8aa08553 PS5, Line 6: > I don't know if this works, but usually there's no space. makefile move to https://review.coreboot.org/c/coreboot/+/56158 and I have test -DFOR_COREBOOT is ok. -- To view, visit https://review.coreboot.org/c/coreboot/+/56106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39342aea902a87cdc2c5b862e5d1a889fcc822c5 Gerrit-Change-Number: 56106 Gerrit-PatchSet: 6 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 08 Jul 2021 07:53:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: vc/mediatek/mt8195: add FOR_COREBOOT define
by Rex-BC Chen (Code Review) 08 Jul '21

08 Jul '21

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56158 ) Change subject: vc/mediatek/mt8195: add FOR_COREBOOT define ...................................................................... vc/mediatek/mt8195: add FOR_COREBOOT define Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ic7a6e24f41c1fda167b5d6bb2d8a2c5c79dda8de --- M src/vendorcode/mediatek/mt8195/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/56158/1 diff --git a/src/vendorcode/mediatek/mt8195/Makefile.inc b/src/vendorcode/mediatek/mt8195/Makefile.inc index 2dd5d09..0873ae3 100644 --- a/src/vendorcode/mediatek/mt8195/Makefile.inc +++ b/src/vendorcode/mediatek/mt8195/Makefile.inc @@ -3,3 +3,4 @@ CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8195/dramc/include -Isrc/vendorcode/mediatek/mt8195/include +CPPFLAGS_common += -DFOR_COREBOOT -- To view, visit https://review.coreboot.org/c/coreboot/+/56158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic7a6e24f41c1fda167b5d6bb2d8a2c5c79dda8de Gerrit-Change-Number: 56158 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings
by Rex-BC Chen (Code Review) 08 Jul '21

08 Jul '21

Attention is currently required from: Rex-BC Chen. Hello Hung-Te Lin, build bot (Jenkins), Ryan Chuang, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56106 to look at the new patch set (#6). Change subject: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings ...................................................................... vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings Signed-off-by: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Change-Id: I39342aea902a87cdc2c5b862e5d1a889fcc822c5 --- M src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c M src/vendorcode/mediatek/mt8195/dramc/dramc_top.c 2 files changed, 18 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/56106/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/56106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39342aea902a87cdc2c5b862e5d1a889fcc822c5 Gerrit-Change-Number: 56106 Gerrit-PatchSet: 6 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/variants/primus: Update GPIO for PS8811 init
by Casper Chang (Code Review) 08 Jul '21

08 Jul '21

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro. Hello Tim Wawrzynczak, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56157 to look at the new patch set (#2). Change subject: mb/google/brya/variants/primus: Update GPIO for PS8811 init ...................................................................... mb/google/brya/variants/primus: Update GPIO for PS8811 init Route GPP_D14 to USB_A1_RT_RST_ODL for PS8811 init sequence BUG=b:193099675 Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Change-Id: Ia950da61a50f30f7c4aaef572c5ed162ee76dd0e --- M src/mainboard/google/brya/variants/primus/gpio.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/56157/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56157 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia950da61a50f30f7c4aaef572c5ed162ee76dd0e Gerrit-Change-Number: 56157 Gerrit-PatchSet: 2 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit July 2021