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Change subject: drivers/intel/gma: Support IGD Opregion 2.1
......................................................................
Patch Set 13:
(1 comment)
File src/drivers/intel/gma/Kconfig:
https://review.coreboot.org/c/coreboot/+/52758/comment/ef79461e_85533544
PS13, Line 105: INTEL_GMA_OPREGION_2_0
> >> What determines this support? Isn't this just something that the kernel driver needs to support? […]
>> @meera, wasn't there a display issue when we are passing 2_0 and driver expects 2_1?
Yes Subrata, So here is the details -
Linux kernel VFIO IGD driver would expose Opregion for guest VM. Current coreboot uses opregion 2.0 for extended VBT, which causes problem for VM passthrough as the VFIO IGD driver only supports Opregion 2.1+
Pasting a snippet of the log that comes with the mismatch of versions
vfio-pci 0000:00:02.0: Extended VBT does not follow opregion on version 0x0201
vfio-pci 0000:00:02.0: Failed to setup Intel IGD regions
[ERROR:src/main.rs:2003] crosvm has exited with error: The archikvm: exiting hardware virtualization
tecture failed to build the vm: error creating devices: Failed to create vfio device failed to get vfio device fd: Invalid argument (os error 22)
reboot: Restarting system
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Change subject: [TESTONLY]do we use cbfs-relative base addresses as input??
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Change subject: [TESTONLY]do we use cbfs-relative base addresses as input??
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
> I mean, if you remove this there'd be no more way at all to define a specific base for a file on non-x86 images, right? While I'm not aware of any board specifically using that right now it's probably not something we should make entirely impossible.
It looks like it's only used on x86 :-) It should not be removed indeed. I was gauging where cbfstool could be simplified as this parameter seems to be used in many different ways.
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Change subject: drivers/intel/gma: Support IGD Opregion 2.1
......................................................................
Patch Set 13:
(1 comment)
File src/drivers/intel/gma/Kconfig:
https://review.coreboot.org/c/coreboot/+/52758/comment/d850b686_b7ac7b01
PS13, Line 105: INTEL_GMA_OPREGION_2_0
> I would recommend to make 2. […]
>> What determines this support? Isn't this just something that the kernel driver needs to support?
yes, you are right. If we drop support for 2_0, then it has to be communicated and what is the expectation also needs to call out. I guess we have some data on that too. @meera, wasn't there a display issue when we are passing 2_0 and driver expects 2_1?
>> Or are there other factors? If it is just the kernel driver dependency, would it make sense to announce this deprecation in coreboot and drop support for 2.0 in next 6-12 months?
Yes, better to take that call into sometime from now as you said 6-12month and we notify others. Thoughts ?
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Change subject: drivers/intel/gma: Support IGD Opregion 2.1
......................................................................
Patch Set 13:
(3 comments)
File src/drivers/intel/gma/Kconfig:
https://review.coreboot.org/c/coreboot/+/52758/comment/9c8d909a_a1409a20
PS13, Line 105: INTEL_GMA_OPREGION_2_0
> I believe that we would need support for 2. […]
I would recommend to make 2.0 as default for now looking at backward platforms and i believe the GFX driver would have different expectations based on opregion being filled.
And let SoC user selects 2_1 and later if we are migrating to latest spec, then it would be easy for SoC user to select that too ?
May be for now majority of platform do support 2_0 hence making 2_1 default would need to go and select 2_0 from respective Kconfig would be too much isn't it ?
File src/drivers/intel/gma/opregion.c:
https://review.coreboot.org/c/coreboot/+/52758/comment/acbb6b0c_7259ac7a
PS13, Line 277:
knowing that we have only 2_1 and 2_0. "return dead_code_t(u32);" is never posisble isn't it as you have made 2_0 always default ?
can we just check one and default return value that applicable for 2_0?
static u32 opregion_version(void)
{
if (CONFIG(INTEL_GMA_OPREGION_2_1))
return 0x201;
return 0x200;
}
https://review.coreboot.org/c/coreboot/+/52758/comment/d9fd64e4_ab9a159b
PS13, Line 294: if (CONFIG(INTEL_GMA_OPREGION_2_0))
i would say, check for 2_1 and return the default for 2_0, in that way we can keep placeholder for Opregion 3.0 in future ?
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Change subject: drivers/intel/gma: Support IGD Opregion 2.1
......................................................................
Patch Set 13:
(1 comment)
File src/drivers/intel/gma/Kconfig:
https://review.coreboot.org/c/coreboot/+/52758/comment/e5c83c0c_f0aa8007
PS13, Line 105: INTEL_GMA_OPREGION_2_0
> I believe that we would need support for 2.0 since all the earlier platforms like cml,jsl and tgl uses 2.0.
What determines this support? Isn't this just something that the kernel driver needs to support? Or are there other factors? If it is just the kernel driver dependency, would it make sense to announce this deprecation in coreboot and drop support for 2.0 in next 6-12 months?
> However, we can make 2.1 as default but we would need a change in soc kconfigs of all earlier platforms. Would that be recommended? Only adl uses 2.1 as of now and one kconfig change would suffice.
Yes, one Kconfig change would suffice for now, but what I have been thinking is:
* What is the direction that we are moving in w.r.t. opregion support in coreboot? Do we intend to keep supporting multiple versions forever or would we be moving to newer versions and deprecate older versions at some point?
* If there are some platforms that cannot absolutely move to newer opregion support, then we can keep multiple versions supported and only the older platforms have to select the non-default version (which should ideally be a small subset).
We don't have to address all these within this CL, but having an understanding of the direction we will be taking would be helpful.
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Change subject: drivers/intel/gma: Support IGD Opregion 2.1
......................................................................
Patch Set 13:
(1 comment)
File src/drivers/intel/gma/Kconfig:
https://review.coreboot.org/c/coreboot/+/52758/comment/830b70c4_4c6052c7
PS13, Line 105: INTEL_GMA_OPREGION_2_0
> Is there a reason why some platforms would want to use version 2.0? Can we move all platforms to 2. […]
I believe that we would need support for 2.0 since all the earlier platforms like cml,jsl and tgl uses 2.0.
However, we can make 2.1 as default but we would need a change in soc kconfigs of all earlier platforms. Would that be recommended?
Only adl uses 2.1 as of now and one kconfig change would suffice.
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50996 )
Change subject: mb/adlrvp: Fix DDR5 Boot issue
......................................................................
Patch Set 15:
(7 comments)
File src/soc/intel/alderlake/meminit.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123629):
https://review.coreboot.org/c/coreboot/+/50996/comment/42085bcc_0b319ce5
PS15, Line 222: static const int spd_array[] = { 0xA0, 0xA2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xA4, 0xA6,
please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123629):
https://review.coreboot.org/c/coreboot/+/50996/comment/07bd092e_704958da
PS15, Line 223: 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123629):
https://review.coreboot.org/c/coreboot/+/50996/comment/6eda3a5e_057f2646
PS15, Line 225: for (int i = 0; i < 16; i++)
please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123629):
https://review.coreboot.org/c/coreboot/+/50996/comment/85009f6c_315047c2
PS15, Line 225: for (int i = 0; i < 16; i++)
suspect code indent for conditional statements (7, 15)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123629):
https://review.coreboot.org/c/coreboot/+/50996/comment/0997ea23_fe71f50d
PS15, Line 226: mem_cfg->SpdAddressTable[i] = spd_array[i];
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123629):
https://review.coreboot.org/c/coreboot/+/50996/comment/ba0c213d_768886ec
PS15, Line 226: mem_cfg->SpdAddressTable[i] = spd_array[i];
please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123629):
https://review.coreboot.org/c/coreboot/+/50996/comment/3d244cc1_2034ac22
PS15, Line 266: mem_populate_channel_data(&soc_mem_cfg[mb_cfg->type], spd_info, half_populated, &data);
line over 96 characters
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Gerrit-Comment-Date: Thu, 08 Jul 2021 06:29:13 +0000
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Attention is currently required from: Bora Guvendik, Furquan Shaikh, Selma Bensaid, Maulik V Vaghela, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Angel Pons, Patrick Rudolph.
Hello Bora Guvendik, build bot (Jenkins), Furquan Shaikh, Selma Bensaid, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/50996
to look at the new patch set (#15).
Change subject: mb/adlrvp: Fix DDR5 Boot issue
......................................................................
mb/adlrvp: Fix DDR5 Boot issue
The coreboot SMBus driver requires additional changes
to accomodate the DDR5 EEPROM read which has resulted in a
broken code flow for boot.
This CL serves as a temp WA to let FSP perform the SPD read
for DDR5 and pass SPD addresses to FSP UPD array.
BUG=b:180458099
TEST=Build and boot DDR5 adlrvp to OS
Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com>
Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a
---
M src/soc/intel/alderlake/meminit.c
1 file changed, 22 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/50996/15
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a
Gerrit-Change-Number: 50996
Gerrit-PatchSet: 15
Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
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Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-MessageType: newpatchset