June 2021 - coreboot-gerrit - mail.coreboot.org

Change in coreboot[master]: mb/google/cherry: Initialize SPM
by Rex-BC Chen (Code Review) June 4, 2021

June 4, 2021

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, DAWEI CHIEN. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, DAWEI CHIEN, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55154 to look at the new patch set (#5). Change subject: mb/google/cherry: Initialize SPM ...................................................................... mb/google/cherry: Initialize SPM This patch adds support for SPM. This adds 43ms to the boot time. TEST=program counter of SPM is correct value after booting up. Signed-off-by: Dawei Chien <dawei.chien(a)mediatek.com> Signed-off-by: Edward-JW Yang <edward-jw.yang(a)mediatek.corp-partner.google.com> Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I5f17f6d51fc9ad2d23c71c3c5cd29fdc777dc071 --- M src/mainboard/google/cherry/mainboard.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/55154/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/55154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f17f6d51fc9ad2d23c71c3c5cd29fdc777dc071 Gerrit-Change-Number: 55154 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: DAWEI CHIEN <dawei.chien(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: DAWEI CHIEN <dawei.chien(a)mediatek.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8195: Enable mt8195 auxadc
by Rex-BC Chen (Code Review) June 4, 2021

June 4, 2021

Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55155 to look at the new patch set (#4). Change subject: soc/mediatek/mt8195: Enable mt8195 auxadc ...................................................................... soc/mediatek/mt8195: Enable mt8195 auxadc Enable auxadc on MediaTek mt8195 platform. Signed-off-by: Zhiqiang Ma <zhiqiang.ma(a)mediatek.com> Change-Id: Ie79420e20c9ed6155791b490e1b5e4b44a579a49 --- M src/soc/mediatek/mt8195/Makefile.inc M src/soc/mediatek/mt8195/include/soc/addressmap.h A src/soc/mediatek/mt8195/include/soc/auxadc.h A src/soc/mediatek/mt8195/include/soc/efuse.h 4 files changed, 44 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/55155/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/55155 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie79420e20c9ed6155791b490e1b5e4b44a579a49 Gerrit-Change-Number: 55155 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/cherry: Get RAM code from ADC
by Rex-BC Chen (Code Review) June 4, 2021

June 4, 2021

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55156 to look at the new patch set (#4). Change subject: mb/google/cherry: Get RAM code from ADC ...................................................................... mb/google/cherry: Get RAM code from ADC On Chromebooks the RAM code is implemented by the resistor straps that we can read and decode from ADC. For Cherry the RAM code can be read from ADC channel 2 and 3. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I4f28bc1c567cb886bd90d930219981a6206b9bb9 --- M src/mainboard/google/cherry/boardid.c M src/soc/mediatek/mt8195/include/soc/auxadc.h 2 files changed, 61 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/55156/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/55156 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f28bc1c567cb886bd90d930219981a6206b9bb9 Gerrit-Change-Number: 55156 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: ec/google/chromeec: Separate SMBIOS SKU functions
by Yu-Ping Wu (Code Review) June 4, 2021

June 4, 2021

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55174 ) Change subject: ec/google/chromeec: Separate SMBIOS SKU functions ...................................................................... ec/google/chromeec: Separate SMBIOS SKU functions All functions in ec_skuid.c except google_chromeec_get_board_sku() are for SMBIOS platforms. Move these functions to a new file to allow non-SMBIOS platforms to use google_chromeec_get_board_sku() without having to declare MAINBOARD_SMBIOS_MANUFACTURER. BUG=none TEST=emerge-cherry coreboot BRANCH=none Change-Id: I8916223f5f04afe4761be4ad3313e900efae90d4 Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/ec/google/chromeec/Makefile.inc M src/ec/google/chromeec/ec_skuid.c A src/ec/google/chromeec/ec_smbios_skuid.c 3 files changed, 45 insertions(+), 36 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/55174/1 diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc index a37d673..c53bffd 100644 --- a/src/ec/google/chromeec/Makefile.inc +++ b/src/ec/google/chromeec/Makefile.inc @@ -13,6 +13,12 @@ romstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SKUID) += ec_skuid.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SKUID) += ec_skuid.c +ifeq ($(CONFIG_GENERATE_SMBIOS_TABLES),y) +smm-$(CONFIG_EC_GOOGLE_CHROMEEC_SKUID) += ec_smbios_skuid.c +romstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SKUID) += ec_smbios_skuid.c +ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SKUID) += ec_smbios_skuid.c +endif + bootblock-y += ec.c bootblock-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c ramstage-y += ec.c crosec_proto.c vstore.c diff --git a/src/ec/google/chromeec/ec_skuid.c b/src/ec/google/chromeec/ec_skuid.c index 39a1c0b..8743244 100644 --- a/src/ec/google/chromeec/ec_skuid.c +++ b/src/ec/google/chromeec/ec_skuid.c @@ -1,11 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <stddef.h> -#include <boardid.h> #include <ec/google/chromeec/ec.h> -#include <console/console.h> -#include <string.h> -#include <smbios.h> uint32_t google_chromeec_get_board_sku(void) { @@ -19,35 +15,3 @@ return sku_id; } - -const char *google_chromeec_smbios_system_sku(void) -{ - static char sku_str[14]; /* sku{0..2147483647} */ - uint32_t sku_id = google_chromeec_get_board_sku(); - snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id); - return sku_str; -} - -const char *smbios_system_sku(void) -{ - return google_chromeec_smbios_system_sku(); -} - -const char *smbios_mainboard_manufacturer(void) -{ - static char oem_name[32]; - static const char *manuf; - - if (manuf) - return manuf; - - if (google_chromeec_cbi_get_oem_name(&oem_name[0], - ARRAY_SIZE(oem_name)) < 0) { - printk(BIOS_ERR, "Couldn't obtain OEM name from CBI\n"); - manuf = CONFIG_MAINBOARD_SMBIOS_MANUFACTURER; - } else { - manuf = &oem_name[0]; - } - - return manuf; -} diff --git a/src/ec/google/chromeec/ec_smbios_skuid.c b/src/ec/google/chromeec/ec_smbios_skuid.c new file mode 100644 index 0000000..1ee7283 --- /dev/null +++ b/src/ec/google/chromeec/ec_smbios_skuid.c @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <stddef.h> +#include <ec/google/chromeec/ec.h> +#include <console/console.h> +#include <string.h> +#include <smbios.h> + +const char *google_chromeec_smbios_system_sku(void) +{ + static char sku_str[14]; /* sku{0..2147483647} */ + uint32_t sku_id = google_chromeec_get_board_sku(); + snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id); + return sku_str; +} + +const char *smbios_system_sku(void) +{ + return google_chromeec_smbios_system_sku(); +} + +const char *smbios_mainboard_manufacturer(void) +{ + static char oem_name[32]; + static const char *manuf; + + if (manuf) + return manuf; + + if (google_chromeec_cbi_get_oem_name(&oem_name[0], + ARRAY_SIZE(oem_name)) < 0) { + printk(BIOS_ERR, "Couldn't obtain OEM name from CBI\n"); + manuf = CONFIG_MAINBOARD_SMBIOS_MANUFACTURER; + } else { + manuf = &oem_name[0]; + } + + return manuf; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/55174 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8916223f5f04afe4761be4ad3313e900efae90d4 Gerrit-Change-Number: 55174 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek/mt8195: Enable mt8195 auxadc
by Yu-Ping Wu (Code Review) June 4, 2021

June 4, 2021

Attention is currently required from: Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55155 ) Change subject: soc/mediatek/mt8195: Enable mt8195 auxadc ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/mt8195/include/soc/auxadc.h: https://review.coreboot.org/c/coreboot/+/55155/comment/d0abf9a4_aadac61f PS3, Line 3: ADC AUXADC -- To view, visit https://review.coreboot.org/c/coreboot/+/55155 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie79420e20c9ed6155791b490e1b5e4b44a579a49 Gerrit-Change-Number: 55155 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 04 Jun 2021 02:32:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/cherry: Initialize SPM
by Yu-Ping Wu (Code Review) June 4, 2021

June 4, 2021

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, DAWEI CHIEN. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55154 ) Change subject: mb/google/cherry: Initialize SPM ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/55154/comment/4b948754_091f8110 PS4, Line 10: This adds 43ms to the boot time. Move the first few words to the previous line. -- To view, visit https://review.coreboot.org/c/coreboot/+/55154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f17f6d51fc9ad2d23c71c3c5cd29fdc777dc071 Gerrit-Change-Number: 55154 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: DAWEI CHIEN <dawei.chien(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: DAWEI CHIEN <dawei.chien(a)mediatek.com> Gerrit-Comment-Date: Fri, 04 Jun 2021 02:30:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: include: always unsigned long for size_t
by Jacob Garber (Code Review) June 4, 2021

June 4, 2021

Attention is currently required from: Paul Menzel, Julius Werner. Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55075 ) Change subject: include: always unsigned long for size_t ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Example build failure: […] Yeah, it looks like GCC is using its own definition of size_t when warning about the format modifiers that conflicts with unsigned long. Unfortunately I think that means this is a no-go (and the macro stuff then has to stay). -- To view, visit https://review.coreboot.org/c/coreboot/+/55075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a8fa97c6961991dd8e291d2dc7d8762f83cad6d Gerrit-Change-Number: 55075 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 04 Jun 2021 02:27:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/cherry: Initialize SPM
by Rex-BC Chen (Code Review) June 4, 2021

June 4, 2021

Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55141 ) Change subject: mb/google/cherry: Initialize SPM ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I91787666f6b1421c065212e1f96619fdb2b966d7 Gerrit-Change-Number: 55141 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: DAWEI CHIEN <dawei.chien(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 04 Jun 2021 02:25:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: Enable mt8195 auxadc
by Rex-BC Chen (Code Review) June 4, 2021

June 4, 2021

Attention is currently required from: Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55155 ) Change subject: soc/mediatek/mt8195: Enable mt8195 auxadc ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55155 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie79420e20c9ed6155791b490e1b5e4b44a579a49 Gerrit-Change-Number: 55155 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 04 Jun 2021 02:25:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/cherry: Initialize SPM
by Rex-BC Chen (Code Review) June 4, 2021

June 4, 2021

Rex-BC Chen has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/55141 ) Change subject: mb/google/cherry: Initialize SPM ...................................................................... Removed Code-Review-1 by Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> -- To view, visit https://review.coreboot.org/c/coreboot/+/55141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I91787666f6b1421c065212e1f96619fdb2b966d7 Gerrit-Change-Number: 55141 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: DAWEI CHIEN <dawei.chien(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteVote

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