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Hello Felix Singer, build bot (Jenkins), Wonkyu Kim, Maulik V Vaghela, Ravishankar Sarawadi, Mario Scheithauer, Subrata Banik, Werner Zeh,
I'd like you to reexamine a change. Please visit
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Change subject: 3rdparty/fsp: Update submodule pointer to newest master
......................................................................
3rdparty/fsp: Update submodule pointer to newest master
Newest master includes these changes:
1. Introduce the FSP package for Elkhart Lake SKUs
2. Introduce the FSP package for IOTG Tiger Lake SKUs
3. Update the FSP package to latest version for Apollo Lake,
Comet Lake and Tiger Lake (client SKUs)
Signed-off-by: Lean Sheng Tan <lean.sheng.tan(a)intel.com>
Change-Id: I96d147fec82d0fcd5c7748c277deb0672a975ceb
---
M 3rdparty/fsp
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/55228/2
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55198
to look at the new patch set (#4).
Change subject: [RFC,WIP] cpu/x86/lapic: Evaluate x2apic_mode just once
......................................................................
[RFC,WIP] cpu/x86/lapic: Evaluate x2apic_mode just once
TBD: Actually set and test.
Change-Id: Iff4f5dc50999f977eaf9b32e7caebf098a3600fe
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/cpu/x86/lapic/Makefile.inc
M src/cpu/x86/lapic/lapic.c
M src/include/cpu/x86/lapic.h
3 files changed, 14 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/55198/4
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Lean Sheng Tan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55228 )
Change subject: 3rdparty/fsp: Update submodule pointer to newest master
......................................................................
3rdparty/fsp: Update submodule pointer to newest master
Newest master include this changes:
1. Introduce the FSP package for Elkhart Lake SKUs
2. Introduce the FSP package for IOTG Tiger Lake SKUs
3. Update the FSP package to latest version for Apollo Lake,
Comet Lake and Tiger Lake (client SKUs)
Signed-off-by: Lean Sheng Tan <lean.sheng.tan(a)intel.com>
Change-Id: I96d147fec82d0fcd5c7748c277deb0672a975ceb
---
M 3rdparty/fsp
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/55228/1
diff --git a/3rdparty/fsp b/3rdparty/fsp
index e7138bf..7954a8d 160000
--- a/3rdparty/fsp
+++ b/3rdparty/fsp
@@ -1 +1 @@
-Subproject commit e7138bf11508b8b82350bd17fb611b67c0c64e6b
+Subproject commit 7954a8db808942a7430a00f4e5a757eb84951edc
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55224 )
Change subject: soc/intel/skylake: Auto-configure SerialIoDevMode UPD
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> Well, it doesn't account for devices in ACPI mode. […]
I'll know better once I've updated all boards 😜
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Change subject: soc/intel/skylake: Auto-configure SerialIoDevMode UPD
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> You mentioned in IRC that this does not handle all (corner) cases. […]
Well, it doesn't account for devices in ACPI mode. However, I don't think any board uses SerialIO devices in ACPI mode.
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Change subject: soc/intel/skylake: Auto-configure SerialIoDevMode UPD
......................................................................
Patch Set 2: Code-Review+2
(1 comment)
Patchset:
PS2:
You mentioned in IRC that this does not handle all (corner) cases. Maybe add some words on this to the commit msg?
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Change subject: mb/google/dedede/var/kracko: Add P-sensor support
......................................................................
Patch Set 6: Code-Review+2
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Change subject: soc/intel/alderlake: Add configurable value for UsbTcPortEn
......................................................................
Patch Set 6:
(6 comments)
File src/soc/intel/alderlake/chip.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120774):
https://review.coreboot.org/c/coreboot/+/54334/comment/48947437_b9dc110a
PS6, Line 44: * Specifies which Type-C Ports are enabled on the system
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120774):
https://review.coreboot.org/c/coreboot/+/54334/comment/4b78cc11_3940d89f
PS6, Line 45: * each bit represents a port starting at 0
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120774):
https://review.coreboot.org/c/coreboot/+/54334/comment/8d87d99f_8e315403
PS6, Line 46: * Example: set value to 0x3 for ports 0 and 1 to be enabled
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120774):
https://review.coreboot.org/c/coreboot/+/54334/comment/1643e21b_986b0711
PS6, Line 47: */
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120774):
https://review.coreboot.org/c/coreboot/+/54334/comment/333dd71e_6fdfc732
PS6, Line 48: uint8_t UsbTcPortEn;
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120774):
https://review.coreboot.org/c/coreboot/+/54334/comment/2ee34b88_edfe7aa8
PS6, Line 48: uint8_t UsbTcPortEn;
please, no spaces at the start of a line
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