coreboot-gerrit June 2021

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Change in coreboot[master]: vc/intel/fsp/fsp2_0/alderlake: Update MemInfoHob.h as per changes in ...
by Ronak Kanabar (Code Review) 07 Jun '21

07 Jun '21

Attention is currently required from: Subrata Banik, Anil Kumar K, Bora Guvendik, Selma Bensaid, Bernardo Perez Priego, Patrick Rudolph. Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55240 ) Change subject: vc/intel/fsp/fsp2_0/alderlake: Update MemInfoHob.h as per changes in FSP v2127_00 onwards ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55240 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86bc11c845d836f39ef5c3d748c5fbb1d098cac0 Gerrit-Change-Number: 55240 Gerrit-PatchSet: 2 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.corp-partner.google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.corp-partner.google.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.corp-partner.google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.corp-partner.google.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Jun 2021 06:15:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/broadwell/pch: Replace ACPI device NVS
by Paul Menzel (Code Review) 06 Jun '21

06 Jun '21

Attention is currently required from: Nico Huber, Angel Pons, Arthur Heymans, Kyösti Mälkki, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52520 ) Change subject: soc/intel/broadwell/pch: Replace ACPI device NVS ...................................................................... Patch Set 8: (1 comment) File src/soc/intel/broadwell/pch/acpi.c: https://review.coreboot.org/c/coreboot/+/52520/comment/d29dee0e_03e177c8 PS4, Line 16: const struct fieldlist field = FIELDLIST_NAMESTR(spcs, 32); : const struct opregion op_reg = OPREGION("SPRT", SYSTEMMEMORY, offset, field.bits / 8); > Done Sorry for probably missing something, but Gerrit says the file is unchanged between patch set 4 and 8. -- To view, visit https://review.coreboot.org/c/coreboot/+/52520 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89fb658fbb10a8769ebea2e6535c45cd7c212d06 Gerrit-Change-Number: 52520 Gerrit-PatchSet: 8 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Jun 2021 05:44:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: Support Realtek audio codec ALC5682I and speaker L/R
by Paul Menzel (Code Review) 06 Jun '21

06 Jun '21

Attention is currently required from: Wayne3 Wang, Henry Sun, Ariel Chang, Paul2 Huang, Alex1 Kao, Karthik Ramasubramanian. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54529 ) Change subject: mb/google/dedede: Support Realtek audio codec ALC5682I and speaker L/R ...................................................................... Patch Set 12: (1 comment) File src/mainboard/google/dedede/variants/pirika/overridetree.cb: https://review.coreboot.org/c/coreboot/+/54529/comment/88c08fd8_b2a2083b PS6, Line 53: RT58 > I refer to waddledee and galtic that use the same audio codec. Please mention that in the commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/54529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8173ffbfb1a8f18978a5e35c69972d4a6d8cb04a Gerrit-Change-Number: 54529 Gerrit-PatchSet: 12 Gerrit-Owner: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Ariel Chang <ariel_chang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kirk Wang <kirk_wang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Wayne3 Wang <wayne3_wang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wayne3 Wang <wayne3_wang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Ariel Chang <ariel_chang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 07 Jun 2021 05:39:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: stddef.h: Use compiler macros for built-in integer types
by Paul Menzel (Code Review) 06 Jun '21

06 Jun '21

Attention is currently required from: Nico Huber, Julius Werner, Jacob Garber. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55260 ) Change subject: stddef.h: Use compiler macros for built-in integer types ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55260 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0874eddf780b6e41ce773ad8b4faa595e4bbd8a7 Gerrit-Change-Number: 55260 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Comment-Date: Mon, 07 Jun 2021 05:38:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/lenovo/w541: Add Thinkpad W541
by Paul Menzel (Code Review) 06 Jun '21

06 Jun '21

Attention is currently required from: Nico Huber, Peter Lemenkov, Angel Pons, Alexander Couzens, Patrick Rudolph, amersel. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52659 ) Change subject: mb/lenovo/w541: Add Thinkpad W541 ...................................................................... Patch Set 14: (1 comment) Patchset: PS14: Maybe Angel or Nico have an idea regarding the graphic issues. -- To view, visit https://review.coreboot.org/c/coreboot/+/52659 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia43070f51bba3cf59ba9b7d9e29e4e778efbeb08 Gerrit-Change-Number: 52659 Gerrit-PatchSet: 14 Gerrit-Owner: amersel Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: amersel Gerrit-Comment-Date: Mon, 07 Jun 2021 05:37:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Set SaIpuEnable UPD from device state
by Paul Menzel (Code Review) 06 Jun '21

06 Jun '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55143 ) Change subject: soc/intel/alderlake: Set SaIpuEnable UPD from device state ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/55143/comment/a770965a_eefecb1d PS1, Line 7: from device state I didn’t know what “device state” means in this context. Maybe just: according to devicetree. https://review.coreboot.org/c/coreboot/+/55143/comment/825e70fd_fc795316 PS1, Line 11: Where you able to test, disabling this device in the devicetree, results in the “IPU” being disabled? -- To view, visit https://review.coreboot.org/c/coreboot/+/55143 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53752f92c4b49093218cc34848727a72b63e84eb Gerrit-Change-Number: 55143 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Jun 2021 05:35:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/model_206ax/acpi.c: Do not report P_BLK
by Werner Zeh (Code Review) 06 Jun '21

06 Jun '21

Attention is currently required from: Nico Huber, Angel Pons, Arthur Heymans, Patrick Rudolph. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55216 ) Change subject: cpu/intel/model_206ax/acpi.c: Do not report P_BLK ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55216 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbf7b915a9909d6bc8e784a439df751e11ec5bee Gerrit-Change-Number: 55216 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Jun 2021 05:30:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: 3rdparty/fsp: Update submodule pointer to newest master
by Werner Zeh (Code Review) 06 Jun '21

06 Jun '21

Werner Zeh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55228 ) Change subject: 3rdparty/fsp: Update submodule pointer to newest master ...................................................................... 3rdparty/fsp: Update submodule pointer to newest master Newest master includes these changes: 1. Introduce the FSP package for Elkhart Lake SKUs 2. Introduce the FSP package for Tiger Lake IoT SKUs 3. Update the FSP package to latest version for Apollo Lake, Comet Lake and Tiger Lake (client SKUs) You can get further 3rdparty/FSP commit history here: https://github.com/intel/FSP/commits/master Signed-off-by: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Change-Id: I96d147fec82d0fcd5c7748c277deb0672a975ceb Reviewed-on: https://review.coreboot.org/c/coreboot/+/55228 Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Reviewed-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M 3rdparty/fsp 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Srinidhi N Kaushik: Looks good to me, approved Wonkyu Kim: Looks good to me, approved diff --git a/3rdparty/fsp b/3rdparty/fsp index e7138bf..7954a8d 160000 --- a/3rdparty/fsp +++ b/3rdparty/fsp @@ -1 +1 @@ -Subproject commit e7138bf11508b8b82350bd17fb611b67c0c64e6b +Subproject commit 7954a8db808942a7430a00f4e5a757eb84951edc -- To view, visit https://review.coreboot.org/c/coreboot/+/55228 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96d147fec82d0fcd5c7748c277deb0672a975ceb Gerrit-Change-Number: 55228 Gerrit-PatchSet: 5 Gerrit-Owner: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: acpi/device: Add ability to generate proper _STA for PowerResource
by Werner Zeh (Code Review) 06 Jun '21

06 Jun '21

Werner Zeh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55027 ) Change subject: acpi/device: Add ability to generate proper _STA for PowerResource ...................................................................... acpi/device: Add ability to generate proper _STA for PowerResource acpi_device_add_power_res currently generates a `_STA` method hardcoded to ON. This change enables the ability to generate a `_STA` method that queries the status of the GPIOs to determine if the power resource is ON or OFF. BUG=b:184617186 TEST=Dump SSDT table for guybrush Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I91410556db002c620fd9aaa99981457808da93a5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55027 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Lance Zhao Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/acpi/device.c M src/include/acpi/acpi_device.h 2 files changed, 56 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Lance Zhao: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/acpi/device.c b/src/acpi/device.c index 5d4d9be..42fa639 100644 --- a/src/acpi/device.c +++ b/src/acpi/device.c @@ -598,6 +598,50 @@ acpi_device_fill_len(desc_length); } +#define ACPI_POWER_RESOURCE_STATUS_ON_OP ONE_OP +#define ACPI_POWER_RESOURCE_STATUS_OFF_OP ZERO_OP + +/** + * Writes an ACPI fragment that will check the GPIO and return 0 if the GPIO + * state does not match the active parameter. + */ +static void acpigen_write_gpio_STA(const struct acpi_gpio *gpio, bool active) +{ + if (!gpio || !gpio->pin_count) + return; + + /* Read current GPIO status into Local0. */ + acpigen_get_tx_gpio(gpio); + + /* + * If (!Local0) + * { + * Return (Zero) + * } + */ + acpigen_write_if(); + if (active) + acpigen_emit_byte(LNOT_OP); + acpigen_emit_byte(LOCAL0_OP); + acpigen_write_return_op(ACPI_POWER_RESOURCE_STATUS_OFF_OP); + acpigen_write_if_end(); +} + +static void acpigen_write_power_res_STA(const struct acpi_power_res_params *params) +{ + acpigen_write_method_serialized("_STA", 0); + + /* Verify all the GPIOs are in the ON state, otherwise return 0 */ + acpigen_write_gpio_STA(params->enable_gpio, true); + acpigen_write_gpio_STA(params->reset_gpio, false); + acpigen_write_gpio_STA(params->stop_gpio, false); + + /* All GPIOs are in the ON state */ + acpigen_write_return_op(ACPI_POWER_RESOURCE_STATUS_ON_OP); + + acpigen_pop_len(); /* Method */ +} + /* PowerResource() with Enable and/or Reset control */ void acpi_device_add_power_res(const struct acpi_power_res_params *params) { @@ -613,8 +657,12 @@ acpigen_write_power_res("PRIC", 0, 0, power_res_dev_states, ARRAY_SIZE(power_res_dev_states)); - /* Method (_STA, 0, NotSerialized) { Return (0x1) } */ - acpigen_write_STA(0x1); + if (params->use_gpio_for_status) { + acpigen_write_power_res_STA(params); + } else { + /* Method (_STA, 0, NotSerialized) { Return (0x1) } */ + acpigen_write_STA(ACPI_POWER_RESOURCE_STATUS_ON_OP); + } /* Method (_ON, 0, Serialized) */ acpigen_write_method_serialized("_ON", 0); diff --git a/src/include/acpi/acpi_device.h b/src/include/acpi/acpi_device.h index 301f9b0..71809eb 100644 --- a/src/include/acpi/acpi_device.h +++ b/src/include/acpi/acpi_device.h @@ -456,6 +456,12 @@ * (_OFF method delay) */ unsigned int stop_off_delay_ms; + + /* Write a _STA method that uses the state of the GPIOs to determine if + * the PowerResource is ON or OFF. If this is false, the _STA method + * will always return ON. + */ + bool use_gpio_for_status; }; /* -- To view, visit https://review.coreboot.org/c/coreboot/+/55027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I91410556db002c620fd9aaa99981457808da93a5 Gerrit-Change-Number: 55027 Gerrit-PatchSet: 5 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/amd/cezanne: Configure I2C Pad RX Select through devicetree
by Werner Zeh (Code Review) 06 Jun '21

06 Jun '21

Werner Zeh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55149 ) Change subject: soc/amd/cezanne: Configure I2C Pad RX Select through devicetree ...................................................................... soc/amd/cezanne: Configure I2C Pad RX Select through devicetree Some of the I2C buses are required to operate at different voltage level compared to other I2C buses eg. I2C bus to Google Security Chip (GSC) should be at 1.8V level. By default, all the I2C buses are initialized to operate at 3.3 V. Add support to configure I2C pad RX select through devicetree and update the concerned devicetree. BUG=b:188538373 TEST=Build and boot to OS in Guybrush. Ensure that the communication with GSC is fine. Build Majolica mainboard. Change-Id: I595a64736fdac0274abffb68c5e521302275b845 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55149 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/amd/majolica/devicetree.cb M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb M src/soc/amd/cezanne/chip.h M src/soc/amd/cezanne/i2c.c 4 files changed, 17 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Raul Rangel: Looks good to me, approved diff --git a/src/mainboard/amd/majolica/devicetree.cb b/src/mainboard/amd/majolica/devicetree.cb index dc73b84..5e9d971 100644 --- a/src/mainboard/amd/majolica/devicetree.cb +++ b/src/mainboard/amd/majolica/devicetree.cb @@ -13,6 +13,12 @@ .flash_ch_en = 0, }" + # I2C Pad Control RX Select Configuration + register "i2c_pad_ctrl_rx_sel[0]" = "I2C_PAD_CTRL_RX_SEL_3_3V" + register "i2c_pad_ctrl_rx_sel[1]" = "I2C_PAD_CTRL_RX_SEL_3_3V" + register "i2c_pad_ctrl_rx_sel[2]" = "I2C_PAD_CTRL_RX_SEL_3_3V" + register "i2c_pad_ctrl_rx_sel[3]" = "I2C_PAD_CTRL_RX_SEL_3_3V" + register "s0ix_enable" = "true" register "pspp_policy" = "DXIO_PSPP_BALANCED" diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb index c778914..2c0c5d9 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb @@ -51,6 +51,11 @@ register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | GPIO_I2C2_SCL | GPIO_I2C3_SCL" + # I2C Pad Control RX Select Configuration + register "i2c_pad_ctrl_rx_sel[0]" = "I2C_PAD_CTRL_RX_SEL_3_3V" # Trackpad + register "i2c_pad_ctrl_rx_sel[1]" = "I2C_PAD_CTRL_RX_SEL_3_3V" # Touchscreen + register "i2c_pad_ctrl_rx_sel[2]" = "I2C_PAD_CTRL_RX_SEL_3_3V" # Audio/SAR + register "i2c_pad_ctrl_rx_sel[3]" = "I2C_PAD_CTRL_RX_SEL_1_8V" # GSC register "pspp_policy" = "DXIO_PSPP_POWERSAVE" diff --git a/src/soc/amd/cezanne/chip.h b/src/soc/amd/cezanne/chip.h index df2059a..319ce41 100644 --- a/src/soc/amd/cezanne/chip.h +++ b/src/soc/amd/cezanne/chip.h @@ -14,6 +14,7 @@ struct soc_amd_common_config common_config; u8 i2c_scl_reset; struct dw_i2c_bus_config i2c[I2C_CTRLR_COUNT]; + u8 i2c_pad_ctrl_rx_sel[I2C_CTRLR_COUNT]; /* Enable S0iX support */ bool s0ix_enable; diff --git a/src/soc/amd/cezanne/i2c.c b/src/soc/amd/cezanne/i2c.c index 6571ff5..008b261 100644 --- a/src/soc/amd/cezanne/i2c.c +++ b/src/soc/amd/cezanne/i2c.c @@ -37,9 +37,13 @@ void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg) { + const struct soc_amd_cezanne_config *config = config_of_soc(); uint32_t pad_ctrl; int misc_reg; + if (bus >= ARRAY_SIZE(config->i2c_pad_ctrl_rx_sel)) + return; + misc_reg = MISC_I2C0_PAD_CTRL + sizeof(uint32_t) * bus; pad_ctrl = misc_read32(misc_reg); @@ -47,7 +51,7 @@ pad_ctrl |= I2C_PAD_CTRL_NG_NORMAL; pad_ctrl &= ~I2C_PAD_CTRL_RX_SEL_MASK; - pad_ctrl |= I2C_PAD_CTRL_RX_SEL_3_3V; + pad_ctrl |= config->i2c_pad_ctrl_rx_sel[bus]; pad_ctrl &= ~I2C_PAD_CTRL_FALLSLEW_MASK; pad_ctrl |= cfg->speed == I2C_SPEED_STANDARD ? -- To view, visit https://review.coreboot.org/c/coreboot/+/55149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I595a64736fdac0274abffb68c5e521302275b845 Gerrit-Change-Number: 55149 Gerrit-PatchSet: 5 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit June 2021