coreboot-gerrit June 2021

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Change in coreboot[master]: soc/intel/alderlake: Update ACPI device ID of IOM
by Maulik V Vaghela (Code Review) 07 Jun '21

07 Jun '21

Attention is currently required from: Furquan Shaikh, Patrick Rudolph, Azhar Shaikh. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54859 ) Change subject: soc/intel/alderlake: Update ACPI device ID of IOM ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/54859/comment/99c0f555_71f11089 PS1, Line 13: > Let's add: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/54859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifdfcd0c1534e8204719e59e718688cd42e846e84 Gerrit-Change-Number: 54859 Gerrit-PatchSet: 1 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Azhar Shaikh <azhar.shaikh(a)intel.com> Gerrit-CC: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Azhar Shaikh <azhar.shaikh(a)intel.com> Gerrit-Comment-Date: Mon, 07 Jun 2021 07:55:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/intel: Add Alder Lake's GT device ID
by Ronak Kanabar (Code Review) 07 Jun '21

07 Jun '21

Attention is currently required from: Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55256 ) Change subject: soc/intel/intel: Add Alder Lake's GT device ID ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f36256505a3e07c6197079ea2013991e841401b Gerrit-Change-Number: 55256 Gerrit-PatchSet: 4 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Jun 2021 07:53:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/intel: Add Alder Lake's GT device ID
by Maulik V Vaghela (Code Review) 07 Jun '21

07 Jun '21

Attention is currently required from: Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55256 ) Change subject: soc/intel/intel: Add Alder Lake's GT device ID ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f36256505a3e07c6197079ea2013991e841401b Gerrit-Change-Number: 55256 Gerrit-PatchSet: 4 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Jun 2021 07:44:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP] cpu/x86/lapic: Enable X2APIC mode
by Kyösti Mälkki (Code Review) 07 Jun '21

07 Jun '21

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55262 ) Change subject: [WIP] cpu/x86/lapic: Enable X2APIC mode ...................................................................... [WIP] cpu/x86/lapic: Enable X2APIC mode Change-Id: I19a990ba287d21ccddaa64601923f1c4830e95e9 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/x86/lapic/lapic.c 1 file changed, 37 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/55262/1 diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c index 9d1684b..a511b62 100644 --- a/src/cpu/x86/lapic/lapic.c +++ b/src/cpu/x86/lapic/lapic.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> #include <cpu/cpu.h> #include <cpu/x86/lapic.h> #include <cpu/x86/lapic_def.h> @@ -7,16 +8,46 @@ #include <console/console.h> #include <stdint.h> +static bool cpu_has_x2apic_support(void) +{ + /* FIXME: Check feature bits? */ + return false; +} + void enable_lapic(void) { + uintptr_t apic_base; + bool use_x2apic; msr_t msr; msr = rdmsr(LAPIC_BASE_MSR); - msr.hi &= 0xffffff00; - msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK; - msr.lo |= LAPIC_DEFAULT_BASE; - msr.lo |= LAPIC_BASE_MSR_ENABLE; - wrmsr(LAPIC_BASE_MSR, msr); + if (!(msr.lo & LAPIC_BASE_MSR_ENABLE)) { + msr.hi &= 0xffffff00; + msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK; + msr.lo |= LAPIC_DEFAULT_BASE; + msr.lo |= LAPIC_BASE_MSR_ENABLE; + wrmsr(LAPIC_BASE_MSR, msr); + msr = rdmsr(LAPIC_BASE_MSR); + } + + ASSERT(msr.lo & LAPIC_BASE_MSR_ENABLE); + + if (CONFIG(XAPIC_ONLY)) + use_x2apic = false; + else if (CONFIG(X2APIC_ONLY)) + use_x2apic = true; + else + use_x2apic = cpu_has_x2apic_support(); + + apic_base = msr.lo & LAPIC_BASE_MSR_ADDR_MASK; + ASSERT(apic_base == LAPIC_DEFAULT_BASE); + + if (use_x2apic == !!(msr.lo & LAPIC_BASE_MSR_X2APIC_MODE)) { + + } else if (use_x2apic) { + msr.lo |= LAPIC_BASE_MSR_X2APIC_MODE; + wrmsr(LAPIC_BASE_MSR, msr); + } printk(BIOS_INFO, "Setting up local APIC...\n"); printk(BIOS_DEBUG, " apic_id: 0x%x ", lapicid()); @@ -27,7 +58,7 @@ { msr_t msr; msr = rdmsr(LAPIC_BASE_MSR); - msr.lo &= ~LAPIC_BASE_MSR_ENABLE; + msr.lo &= ~(LAPIC_BASE_MSR_ENABLE | LAPIC_BASE_MSR_X2APIC_MODE); wrmsr(LAPIC_BASE_MSR, msr); } -- To view, visit https://review.coreboot.org/c/coreboot/+/55262 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19a990ba287d21ccddaa64601923f1c4830e95e9 Gerrit-Change-Number: 55262 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: cpu/x86/lapic: Split virtual_wire_mode_init()
by Kyösti Mälkki (Code Review) 07 Jun '21

07 Jun '21

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55261 ) Change subject: cpu/x86/lapic: Split virtual_wire_mode_init() ...................................................................... cpu/x86/lapic: Split virtual_wire_mode_init() Only the enable_lapic() part is required while doing SMP init. Also disable_lapic() must not be called if we relay on LAPIC for timer source. Change-Id: Ib5e37c1a0a91fa4e9542141aa74f1c1876fee94e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/x86/lapic/lapic.c 1 file changed, 13 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/55261/1 diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c index 9aac163..9d1684b 100644 --- a/src/cpu/x86/lapic/lapic.c +++ b/src/cpu/x86/lapic/lapic.c @@ -10,12 +10,17 @@ void enable_lapic(void) { msr_t msr; + msr = rdmsr(LAPIC_BASE_MSR); msr.hi &= 0xffffff00; msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK; msr.lo |= LAPIC_DEFAULT_BASE; msr.lo |= LAPIC_BASE_MSR_ENABLE; wrmsr(LAPIC_BASE_MSR, msr); + + printk(BIOS_INFO, "Setting up local APIC...\n"); + printk(BIOS_DEBUG, " apic_id: 0x%x ", lapicid()); + printk(BIOS_INFO, "done.\n"); } void disable_lapic(void) @@ -39,19 +44,6 @@ static void lapic_virtual_wire_mode_init(void) { - /* this is so interrupts work. This is very limited scope -- - * linux will do better later, we hope ... - */ - /* this is the first way we learned to do it. It fails on real SMP - * stuff. So we have to do things differently ... - * see the Intel mp1.4 spec, page A-3 - */ - - printk(BIOS_INFO, "Setting up local APIC...\n"); - - /* Enable the local APIC */ - enable_lapic(); - /* * Set Task Priority to 'accept all'. */ @@ -70,14 +62,18 @@ lapic_update32(LAPIC_LVT1, ~mask, LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING | LAPIC_DELIVERY_MODE_NMI); - printk(BIOS_DEBUG, " apic_id: 0x%x ", lapicid()); - printk(BIOS_INFO, "done.\n"); } void setup_lapic(void) { + /* Enable the local APIC */ + if (need_lapic_init()) { + enable_lapic(); + } else if (!CONFIG(UDELAY_LAPIC)) + disable_lapic(); + + /* This programming is for PIC mode i8259 interrupts to be delivered to CPU + * while LAPIC is enabled. */ if (need_lapic_init()) lapic_virtual_wire_mode_init(); - else - disable_lapic(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/55261 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib5e37c1a0a91fa4e9542141aa74f1c1876fee94e Gerrit-Change-Number: 55261 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: cpu/x86/lapic: Avoid aliasing MMIO writes
by Kyösti Mälkki (Code Review) 07 Jun '21

07 Jun '21

Hello build bot (Jenkins), Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55200 to look at the new patch set (#7). Change subject: cpu/x86/lapic: Avoid aliasing MMIO writes ...................................................................... cpu/x86/lapic: Avoid aliasing MMIO writes Change-Id: I75440cb0742eeaa140f49e7e4a4c51a96465441b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/x86/lapic/lapic.c M src/include/cpu/x86/lapic.h 2 files changed, 12 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/55200/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/55200 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I75440cb0742eeaa140f49e7e4a4c51a96465441b Gerrit-Change-Number: 55200 Gerrit-PatchSet: 7 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [RFC,WIP] cpu/x86/lapic: Evaluate x2apic_mode just once
by Kyösti Mälkki (Code Review) 07 Jun '21

07 Jun '21

Attention is currently required from: Kyösti Mälkki. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55198 to look at the new patch set (#5). Change subject: [RFC,WIP] cpu/x86/lapic: Evaluate x2apic_mode just once ...................................................................... [RFC,WIP] cpu/x86/lapic: Evaluate x2apic_mode just once Change-Id: Iff4f5dc50999f977eaf9b32e7caebf098a3600fe Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/x86/lapic/lapic.c M src/include/cpu/x86/lapic.h 2 files changed, 9 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/55198/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/55198 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iff4f5dc50999f977eaf9b32e7caebf098a3600fe Gerrit-Change-Number: 55198 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/intel: Add Alder Lake's GT device ID
by Sridhar Siricilla (Code Review) 07 Jun '21

07 Jun '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Rizwan Qureshi, Tim Wawrzynczak, Patrick Rudolph. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55256 ) Change subject: soc/intel/intel: Add Alder Lake's GT device ID ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/55256/comment/43d927a6_f1035a02 PS1, Line 7: soc/intel/intel: Add Alder Lake device ID > GT Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/55256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f36256505a3e07c6197079ea2013991e841401b Gerrit-Change-Number: 55256 Gerrit-PatchSet: 4 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Jun 2021 07:28:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/intel: Add Alder Lake's GT device ID
by Sridhar Siricilla (Code Review) 07 Jun '21

07 Jun '21

Attention is currently required from: Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Maulik V Vaghela, Rizwan Qureshi, Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55256 to look at the new patch set (#4). Change subject: soc/intel/intel: Add Alder Lake's GT device ID ...................................................................... soc/intel/intel: Add Alder Lake's GT device ID Add Alder Lake specific Graphics device ID. As per latest document number: 641765, this ID got an update. Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: I6f36256505a3e07c6197079ea2013991e841401b --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/common/block/graphics/graphics.c 3 files changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/55256/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/55256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f36256505a3e07c6197079ea2013991e841401b Gerrit-Change-Number: 55256 Gerrit-PatchSet: 4 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede: Support Realtek audio codec ALC5682I and speaker L/R
by Alex1 Kao (Code Review) 07 Jun '21

07 Jun '21

Attention is currently required from: Wayne3 Wang, Henry Sun, Ariel Chang, Paul Menzel, Paul2 Huang, Karthik Ramasubramanian. Alex1 Kao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54529 ) Change subject: mb/google/dedede: Support Realtek audio codec ALC5682I and speaker L/R ...................................................................... Patch Set 13: (1 comment) File src/mainboard/google/dedede/variants/pirika/overridetree.cb: https://review.coreboot.org/c/coreboot/+/54529/comment/bb29983c_db492fc5 PS6, Line 53: RT58 > Please mention that in the commit message. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/54529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8173ffbfb1a8f18978a5e35c69972d4a6d8cb04a Gerrit-Change-Number: 54529 Gerrit-PatchSet: 13 Gerrit-Owner: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Ariel Chang <ariel_chang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kirk Wang <kirk_wang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Wayne3 Wang <wayne3_wang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wayne3 Wang <wayne3_wang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Ariel Chang <ariel_chang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 07 Jun 2021 07:23:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com> Gerrit-MessageType: comment

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coreboot-gerrit June 2021