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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55059 )
Change subject: soc/amd/picasso: remove warm reset flag code
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55059/comment/a71bf7e0_bcb2c40b
PS2, Line 11: PPR
> If there are several revisions, please mention yours, in case it gets updated.
Done
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Change subject: soc/amd/picasso: remove warm reset flag code
......................................................................
soc/amd/picasso: remove warm reset flag code
Since the MCA(X) registers have defined values on the cold boot path,
the is_warm_reset check can be dropped. Also the warm reset bit in the
NCP_ERR register doesn't behave as the PPR [1] suggested; no matter if
something was written to the register or the machine went through a warm
reset cycle, the NCP_WARM_BOOT bit never got set.
[1] checked with PPR for AMD Family 17h Models 11h,18h B1 (RV,PCO)
#55570 Rev 3.15
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I4e6df98ffd5d15ca204c9847a76c19c753726737
---
M src/soc/amd/picasso/cpu.c
M src/soc/amd/picasso/include/soc/iomap.h
M src/soc/amd/picasso/include/soc/southbridge.h
M src/soc/amd/picasso/mca.c
M src/soc/amd/picasso/reset.c
5 files changed, 25 insertions(+), 47 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/55059/3
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54638 )
Change subject: soc/amd/cezanne: Add pre-FSPM call to the mainboard
......................................................................
Patch Set 3:
(1 comment)
File src/soc/amd/cezanne/fsp_m_params.c:
https://review.coreboot.org/c/coreboot/+/54638/comment/9ed51830_7fd2a57b
PS1, Line 39: __weak void mb_pre_fspm(void)
> i'd prefer the current code over init_gpios_before_psp. also: did you mean fsp? […]
Absolutely. Thanks for being flexible here. As I said, I don't disagree with you.
And yes, I meant FSP, not PSP.
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Change subject: mb/google/guybrush: Add helpers for cbi fw_config settings.
......................................................................
Patch Set 5:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/54639/comment/d7d696f6_b2755899
PS4, Line 7: mb/google/guybrush: Add helpers for fw_config settings.
> Nit: Could you please remove the dot/period at the end of the commit message summary.
Done
File src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h:
https://review.coreboot.org/c/coreboot/+/54639/comment/871ac844_532646de
PS1, Line 38: #define GUYBRUSH_WCN6856_WIFI 0x00
> If you look at the settings in devicetree, the WLAN settings are: […]
Removed wifi. Aligned WWAN to match the CBI fields.
File src/mainboard/google/guybrush/variants/guybrush/helpers.c:
https://review.coreboot.org/c/coreboot/+/54639/comment/68ef597b_9c78b80a
PS4, Line 32: if (config == UNDEFINED_FW_CONFIG || ! fw_config_probe(FW_CONFIG(FP, FP_PRESENT)))
> That series is already +2ed. […]
For now I'm going to keep just doing the manual probe. I don't think the devicetree method is better in these cases unless we have global CBI fields.
If you think I'm wrong, let's talk about it more when I'm back in the office.
https://review.coreboot.org/c/coreboot/+/54639/comment/4bd41b38_0698ca23
PS4, Line 44: get_variant_wwan_type
> BTW, I think I used the wrong part `WWAN_LG850GL` for the probe statement above. […]
You mention having this live in guybrush baseboard, but I don't see how that works if not every platform has WLAN and WWAN_FM350GL defined. Since we decided that fw_config would not be universal, that doesn't seem like it works.
Why is it preferable to go find the device then seeing whether it's enabled or disabled to just calling fw_config_probe?
I can see how it might be better in some cases, like if you can just rely on the enable/disable functions to do everything, but if you can't, like in this case, it just makes things harder, right?
Am I missing something?
https://review.coreboot.org/c/coreboot/+/54639/comment/7c93ab4a_f618e8e0
PS4, Line 60: get_variant_wifi_type
> You're right, I don't need it right now, so I'll remove it.
Done
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/guybrush: Add helpers for cbi fw_config settings.
......................................................................
mb/google/guybrush: Add helpers for cbi fw_config settings.
Turn on CBI and add helper functions for determining the board
configuration from the firmware config settings in CBI.
Move existing FPMCU helper function into the Guybrush folder because
it's not necessarily the same for all Guybrush variants.
BUG=b:187316460
TEST=Verify that configurations match what's set in CBI.
Signed-off-by: Martin Roth <martinroth(a)chromium.org>
Change-Id: I212e7f413b4d8a7d15122cde90100a0ec28e88a6
---
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/guybrush/variants/baseboard/Makefile.inc
M src/mainboard/google/guybrush/variants/baseboard/helpers.c
M src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/guybrush/variants/guybrush/Makefile.inc
A src/mainboard/google/guybrush/variants/guybrush/helpers.c
6 files changed, 38 insertions(+), 21 deletions(-)
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Change subject: soc/intel/alderlake: Configure FIVR, VR, Turbo ratios
......................................................................
soc/intel/alderlake: Configure FIVR, VR, Turbo ratios
This patch configures the following,
* VR configurations
* FIVR configurations
* CPU Power Mgmt Test Config
* Turbo ratios
* LTR config for PCIE
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---
M src/soc/intel/alderlake/fsp_params.c
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Change subject: soc/intel/xeon_sp/cpx: Move MSR Locks to CPU init and fix them
......................................................................
soc/intel/xeon_sp/cpx: Move MSR Locks to CPU init and fix them
Move locking CPU MSRs during CPU init instead of using
CONFIG_PARALLEL_MP_AP_WORK functions.
The AES Lock enable bit caused CPU exception errors as this should not
run on HT siblings. The set_aesni_lock() function takes care of that.
Note that with a CBnT setup APs are already halted so this code was
never run on APs! This is now also fixed.
Change-Id: I21598c3e9a153dce25a09b187ddf9cf6363039d3
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---
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/intel/xeon_sp/cpx/cpu.c
2 files changed, 10 insertions(+), 18 deletions(-)
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Change subject: payloads/Linuxboot/u-root: Explicitly set GO111MODULE=off
......................................................................
payloads/Linuxboot/u-root: Explicitly set GO111MODULE=off
With go1.16 the default for GO111MODULE was changed from 'off' to 'on'
which breaks building u-root.
Change-Id: Ie90b400418ccd06426a0e00ec7f7932066f57d7e
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M payloads/external/LinuxBoot/targets/u-root.mk
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