coreboot-gerrit May 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/amd/picasso: remove warm reset flag code
by Paul Menzel (Code Review) 31 May '21

31 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55059 ) Change subject: soc/amd/picasso: remove warm reset flag code ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55059 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e6df98ffd5d15ca204c9847a76c19c753726737 Gerrit-Change-Number: 55059 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 31 May 2021 17:32:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne/include/iomap: properly align defines
by Paul Menzel (Code Review) 31 May '21

31 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55100 ) Change subject: soc/amd/cezanne/include/iomap: properly align defines ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55100 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14647b3d88146602b96fc1dff2347a293bab0c26 Gerrit-Change-Number: 55100 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 31 May 2021 17:31:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer:intel/common/block: Move mainboard api to tcss comm...
by build bot (Jenkins) (Code Review) 31 May '21

31 May '21

Attention is currently required from: Furquan Shaikh, Sridhar Siricilla, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54733 ) Change subject: mb/google/volteer:intel/common/block: Move mainboard api to tcss common block ...................................................................... Patch Set 3: (2 comments) File src/drivers/intel/pmc_mux/conn/conn.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120417): https://review.coreboot.org/c/coreboot/+/54733/comment/78c008be_cfad812c PS3, Line 89: bool intel_pmc_mux_conn_get_ports(const struct device *conn, unsigned int *usb2_port, open brace '{' following function definitions go on the next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120417): https://review.coreboot.org/c/coreboot/+/54733/comment/49bb62ea_34aef153 PS3, Line 93: if(!conn->chip_info || conn->chip_ops != &drivers_intel_pmc_mux_conn_ops) space required before the open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/54733 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7894363df4862f7cfe733d93e6160677fb8a9e31 Gerrit-Change-Number: 54733 Gerrit-PatchSet: 3 Gerrit-Owner: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 31 May 2021 17:30:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer:intel/common/block: Move mainboard api to tcss comm...
by Deepti Deshatty (Code Review) 31 May '21

31 May '21

Attention is currently required from: Furquan Shaikh, Sridhar Siricilla, Deepti Deshatty, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/54733 to look at the new patch set (#3). Change subject: mb/google/volteer:intel/common/block: Move mainboard api to tcss common block ...................................................................... mb/google/volteer:intel/common/block: Move mainboard api to tcss common block As per the comments in CB:54090 mainboard api mainboard_tcss_get_port_info() is simplified and moved to tcss common block code. Signed-off-by: Deepti Deshatty <deepti.deshatty(a)intel.com> Change-Id: I7894363df4862f7cfe733d93e6160677fb8a9e31 --- M src/drivers/intel/pmc_mux/conn/chip.h M src/drivers/intel/pmc_mux/conn/conn.c M src/mainboard/google/volteer/mainboard.c M src/soc/intel/common/block/include/intelblocks/tcss.h M src/soc/intel/common/block/tcss/tcss.c 5 files changed, 84 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/54733/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/54733 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7894363df4862f7cfe733d93e6160677fb8a9e31 Gerrit-Change-Number: 54733 Gerrit-PatchSet: 3 Gerrit-Owner: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sc7180: Add display support for mipi panels
by build bot (Jenkins) (Code Review) 31 May '21

31 May '21

Attention is currently required from: Ravi kumar, Shelley Chen, Julius Werner, mturney mturney. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52662 ) Change subject: sc7180: Add display support for mipi panels ...................................................................... Patch Set 13: (15 comments) File src/mainboard/google/trogdor/mainboard.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/f52bedf0_3f3748f0 PS13, Line 104: if(CONFIG(TROGDOR_HAS_MIPI_PANEL)) space required before the open parenthesis '(' File src/soc/qualcomm/sc7180/display/dsi.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/9f529d92_69aaa570 PS13, Line 65: write32(&dsi0->trig_ctrl,DSI_DMA_STREAM1 << 8 | DSI_DMA_TRIGGER_SEL); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/d13913ee_3c53063c PS13, Line 172: write32(&dsi0->int_ctrl,0x0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/7c7ad333_c27f54e9 PS13, Line 210: printk(BIOS_ERR, Invalid vsprintf pointer extension '%pk' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/f03abc5b_0809075f PS13, Line 281: wmb(); memory barrier without comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/b1c78d19_26e35722 PS13, Line 289: wmb(); memory barrier without comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/63480036_395c9e60 PS13, Line 292: wmb(); memory barrier without comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/26087f9a_5800a819 PS13, Line 299: wmb(); memory barrier without comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/9e20cfc3_26c1f2ac PS13, Line 302: wmb(); memory barrier without comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/16f5d85d_fe6138b8 PS13, Line 319: write32(&dsi0->int_ctrl,0x0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/c0f69241_67e1db92 PS13, Line 322: setbits32(&dsi0->int_ctrl,DSI_CMD_MODE_DMA_DONE_AK); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/d29e9e69_36bc130d PS13, Line 325: setbits32(&dsi0->int_ctrl,DSI_CMD_MODE_MDP_DONE_AK); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/6943a826_5bfd6c72 PS13, Line 328: setbits32(&dsi0->int_ctrl,DSI_VIDEO_MODE_DONE_AK); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/fb296164_a2e95a16 PS13, Line 333: setbits32(&dsi0->int_ctrl,DSI_ERROR_AK); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120412): https://review.coreboot.org/c/coreboot/+/52662/comment/38786374_009dad18 PS13, Line 343: if(!pinfo && !pinfo->init_cmd) space required before the open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/52662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id698265a4e2399ad1c26e026e9a5f8ecd305467f Gerrit-Change-Number: 52662 Gerrit-PatchSet: 13 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Mon, 31 May 2021 15:53:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: HACK sc7280: QSIP SPI NOR addressing mode HACK
by build bot (Jenkins) (Code Review) 31 May '21

31 May '21

Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50586 ) Change subject: HACK sc7280: QSIP SPI NOR addressing mode HACK ...................................................................... Patch Set 43: (1 comment) File src/drivers/spi/spi_flash.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120408): https://review.coreboot.org/c/coreboot/+/50586/comment/d0371f84_d731bed0 PS43, Line 499: while (1) suspect code indent for conditional statements (16, 16) -- To view, visit https://review.coreboot.org/c/coreboot/+/50586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ied5b647d0fcc8e3effff3bb7c8680ed5a0c1f3d4 Gerrit-Change-Number: 50586 Gerrit-PatchSet: 43 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Sajida Bhanu <sbhanu(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Mon, 31 May 2021 15:53:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload: Add MMIO support in PCI lib
by build bot (Jenkins) (Code Review) 31 May '21

31 May '21

Attention is currently required from: Ravi kumar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53903 ) Change subject: libpayload: Add MMIO support in PCI lib ...................................................................... Patch Set 10: (5 comments) File payloads/libpayload/include/arm64/arch/io.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120405): https://review.coreboot.org/c/coreboot/+/53903/comment/b08c1e75_d7229b66 PS10, Line 154: } void function return statements are not generally useful Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120405): https://review.coreboot.org/c/coreboot/+/53903/comment/61eb119a_47ae1123 PS10, Line 159: } void function return statements are not generally useful File src/commonlib/include/commonlib/coreboot_tables.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120405): https://review.coreboot.org/c/coreboot/+/53903/comment/35c72e21_488dddaf PS10, Line 332: uint32_t tag; please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120405): https://review.coreboot.org/c/coreboot/+/53903/comment/e65fd001_922268f6 PS10, Line 333: uint32_t size; please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120405): https://review.coreboot.org/c/coreboot/+/53903/comment/1bdde97e_23cb3ce8 PS10, Line 334: void *config_base; please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/53903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7cfb95e31b7ee984ee0c2e7586e6caeecd7deadd Gerrit-Change-Number: 53903 Gerrit-PatchSet: 10 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Comment-Date: Mon, 31 May 2021 15:52:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Add PCIe RC driver in Coreboot
by build bot (Jenkins) (Code Review) 31 May '21

31 May '21

Attention is currently required from: Shelley Chen, Ravi kumar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53902 ) Change subject: sc7280: Add PCIe RC driver in Coreboot ...................................................................... Patch Set 10: (26 comments) File src/soc/qualcomm/sc7280/include/soc/addressmap.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/b5d94c7f_9bd4698c PS10, Line 68: #define PCIE1_MEM_SIZE 0x1fd00000 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/2fe8af37_ecf164cb PS10, Line 69: #define PCIE_MEM_END 0x404fffff please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/b010d383_9eb8aa5b PS10, Line 72: #define PCIE_1_QMP_PHY 0x01C0E000 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/338a1b85_eec49ed2 PS10, Line 76: #define PCE1_QPHY_SERDES 0x01C0E000 please, no space before tabs File src/soc/qualcomm/sc7280/include/soc/pcie.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/cf9917df_171e01a7 PS10, Line 18: #define DEV_ID_SZ 16 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/b154fbc9_ab3b85c3 PS10, Line 19: #define CLASS_SZ 16 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/0e9807b6_1354fe9f PS10, Line 20: #define HEADER_SZ 8 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/b909a469_2ac4e12d PS10, Line 21: #define VEND_ID_SZ 16 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/444c67d4_f6ff1fc4 PS10, Line 25: #define PCIE_CLASS 0x0a please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/9a0c3437_38dafdbd PS10, Line 26: #define PCI_MAX_DEV_FN 0x100 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/1767355d_df4d0765 PS10, Line 41: #define PCIE1_3x2_NUM_LANES 2 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/470bd418_7dc80ba4 PS10, Line 57: #define PERST_DELAY_US 1000 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/b3aee9de_7d3f8eab PS10, Line 58: #define PCIE_MAX_BARS 6 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/6cee383f_3195cabe PS10, Line 154: #define PCIE1_QMP_PHY_PCS_COM 0x01C0EA00 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/63f5987f_019ffee1 PS10, Line 155: #define PCE1_QPHY_SERDES 0x01C0E000 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/39cab266_bbaa0fe4 PS10, Line 156: #define PCE1_QPHY_TX0 0x01C0E200 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/afd5ec99_eb904227 PS10, Line 157: #define PCE1_QPHY_RX0 0x01C0E400 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/bf65e24a_ba803ca2 PS10, Line 169: #define PCIE_DEV_FUNC (dev,func) PCI_SLOT(devfn) | PCI_FUNC(devfn) space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/e7b1ca29_afca5293 PS10, Line 169: #define PCIE_DEV_FUNC (dev,func) PCI_SLOT(devfn) | PCI_FUNC(devfn) Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/cb3c7c6a_fb7c72ce PS10, Line 188: #define PCIE_DEV(_bus, _dev, _fn) (0x80000000 | \ Macros with complex values should be enclosed in parentheses File src/soc/qualcomm/sc7280/pcie_host.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/ba54bc1d_e9f336e1 PS10, Line 303: pci_ep_cfg_info.config_base = (void*)PCIE1_GEN3x2_CONF; "(foo*)" should be "(foo *)" Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/786ed5fa_b132338f PS10, Line 459: printk(BIOS_INFO,"pcie ep PERST asserted \n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/6b2cf63f_f707b594 PS10, Line 459: printk(BIOS_INFO,"pcie ep PERST asserted \n"); unnecessary whitespace before a quoted newline Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/4a5c1022_d15b1b1e PS10, Line 468: printk(BIOS_NOTICE,"pcie ep PERST desserted\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/e9c3323f_fb26eb8c PS10, Line 773: if (vend_id == 0xffff || vend_id == 0x0000) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120404): https://review.coreboot.org/c/coreboot/+/53902/comment/7b044b29_cc3e1e12 PS10, Line 1140: if(!ret) space required before the open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/53902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631 Gerrit-Change-Number: 53902 Gerrit-PatchSet: 10 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Comment-Date: Mon, 31 May 2021 15:52:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Add GSI FW download support
by build bot (Jenkins) (Code Review) 31 May '21

31 May '21

Attention is currently required from: Shelley Chen, Ravi kumar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52371 ) Change subject: sc7280: Add GSI FW download support ...................................................................... Patch Set 15: (11 comments) File src/soc/qualcomm/sc7280/include/soc/qupv3_config.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/7b5d2ce7_a4bec13f PS15, Line 77: { open brace '{' following struct go on the same line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/3d24863a_c34ceda8 PS15, Line 79: uint32_t iram_dword1; /* word 1 of a single IRAM firmware entry */ please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/8d85eedf_eb3f1572 PS15, Line 83: { open brace '{' following struct go on the same line File src/soc/qualcomm/sc7280/qupv3_config.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/167c553b_51f2ac9c PS15, Line 204: write32(&regs->gsi_periph_base_lsb,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/d8f90e5f_c0934278 PS15, Line 205: write32(&regs->gsi_periph_base_msb,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/ece5adc6_18cb549a PS15, Line 210: if (fwIep[i].offset < GSI_REG_BASE_SIZE) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/5a6d83d8_434dd7b8 PS15, Line 221: memcpy((&regs->gsi_inst_ramn),(void *)fwIRam, space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/bea07e83_f1a0b13f PS15, Line 223: setbits_le32(&regs->gsi_mcs_cfg, GSI_MCS_CFG_MCS_ENABLE_BMSK ); space prohibited before that close parenthesis ')' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/18117336_2ee08472 PS15, Line 224: setbits_le32(&regs->gsi_cfg, GSI_CFG_DOUBLE_MCS_CLK_FREQ_BMSK | GSI_CFG_GSI_ENABLE_BMSK); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/e3bdfb42_fc1f2ad1 PS15, Line 226: write32(&regs->gsi_ee_n_scratch_0_addr,0x0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120402): https://review.coreboot.org/c/coreboot/+/52371/comment/e92dca31_f2eb957a PS15, Line 227: write32(&regs->ee_n_gsi_ee_generic_cmd,0x81); space required after that ',' (ctx:VxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/52371 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b966a6a074fc43c62d2639da9cf68b083cc7319 Gerrit-Change-Number: 52371 Gerrit-PatchSet: 15 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Comment-Date: Mon, 31 May 2021 15:52:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: WIP sc7280: Add USB support WIP
by build bot (Jenkins) (Code Review) 31 May '21

31 May '21

Attention is currently required from: Ravi kumar, Shelley Chen, Sandeep Maheswaram, mturney mturney, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51520 ) Change subject: WIP sc7280: Add USB support WIP ...................................................................... Patch Set 38: (2 comments) File src/soc/qualcomm/sc7280/include/soc/addressmap.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120400): https://review.coreboot.org/c/coreboot/+/51520/comment/e6570c9b_f83966dd PS38, Line 41: trailing whitespace Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120400): https://review.coreboot.org/c/coreboot/+/51520/comment/f38aa33b_07e9dc4b PS38, Line 41: please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/51520 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c10821ea2c9a5082df555caac710011ea3a0af5 Gerrit-Change-Number: 51520 Gerrit-PatchSet: 38 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Sandeep Maheswaram <sanm(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Sandeep Maheswaram <sanm(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 31 May 2021 15:51:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit May 2021