coreboot-gerrit May 2021

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Change in coreboot[master]: drivers/i2c/generic: Set S0W to D3hot for wake device
by Furquan Shaikh (Code Review) 04 May '21

04 May '21

Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52847 ) Change subject: drivers/i2c/generic: Set S0W to D3hot for wake device ...................................................................... drivers/i2c/generic: Set S0W to D3hot for wake device If device is supported as a wake source, _S0W should be set to D3hot. This ensures that the device is put into D3hot by the OSPM. Power resource(PRIC) for the device is listed in both _PR0 and _PR3. Thus, it ensures that the OSPM does not turn off power resource when device is put into D0 and D3hot. Hence, it is capable of waking the system from D3hot state. However, if it is put into D3cold, then the power resource is turned off by the OSPM. The devices we are currently looking at for touchscreen/touchpad do not really support auxiliary power and so do not support wake from D3cold. BUG=b:186070097 TEST=build and check device wake state _S0W set to 3 in ssdt table. Change-Id: I34e4b2350875530d3337be700276bcc4fb1f810a Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52847 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> --- M Documentation/acpi/devicetree.md M src/drivers/i2c/generic/generic.c 2 files changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved diff --git a/Documentation/acpi/devicetree.md b/Documentation/acpi/devicetree.md index f121698..c184fa0 100644 --- a/Documentation/acpi/devicetree.md +++ b/Documentation/acpi/devicetree.md @@ -65,7 +65,7 @@ 0x0000002D, } }) - Name (_S0W, 0x04) // _S0W: S0 Device Wake State + Name (_S0W, ACPI_DEVICE_SLEEP_D3_HOT) // _S0W: S0 Device Wake State Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x15, // GPE #21 @@ -196,7 +196,7 @@ ### _S0W (S0 Device Wake State) _S0W indicates the deepest S0 sleep state this device can wake itself from, -which in this case is 4, representing _D3cold_. +which in this case is ACPI_DEVICE_SLEEP_D3_HOT, representing _D3hot_. ### _PRW (Power Resources for Wake) _PRW indicates the power resources and events required for wake. There are no diff --git a/src/drivers/i2c/generic/generic.c b/src/drivers/i2c/generic/generic.c index 1c7267e..656b9e6 100644 --- a/src/drivers/i2c/generic/generic.c +++ b/src/drivers/i2c/generic/generic.c @@ -98,7 +98,7 @@ /* Wake capabilities */ if (config->wake) { - acpigen_write_name_integer("_S0W", 4); + acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_HOT); acpigen_write_PRW(config->wake, 3); } -- To view, visit https://review.coreboot.org/c/coreboot/+/52847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I34e4b2350875530d3337be700276bcc4fb1f810a Gerrit-Change-Number: 52847 Gerrit-PatchSet: 9 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/puff/var/dooly: enable touchscreen wakeup
by Tony Huang (Code Review) 04 May '21

04 May '21

Attention is currently required from: Sam McNally, Furquan Shaikh, Tim Wawrzynczak, Edward O'Callaghan, Keith Tzeng, Wisley Chen. Tony Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52725 ) Change subject: mb/google/puff/var/dooly: enable touchscreen wakeup ...................................................................... Patch Set 10: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52725/comment/6ed814f0_4305951a PS9, Line 11: Add fake touchscreen enable_pin GPP_D9 to ensure meet power sequence T11 in spec v0.8. > How? What is spec v0. […] Keep current setting, just add wake source. Thanks https://review.coreboot.org/c/coreboot/+/52725/comment/f2824771_57943ea6 PS9, Line 13: empty pin > when you say "empty" do you mean NC or do you mean GND plane? I assume you mean NC but I wanted to c […] Yes, GPP_D9 is NC ping on dooly board. Thanks Patchset: PS10: Please help review. Thanks -- To view, visit https://review.coreboot.org/c/coreboot/+/52725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2bbaab56924849a22a4d05ce53bf5bdcf00265dd Gerrit-Change-Number: 52725 Gerrit-PatchSet: 10 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 05 May 2021 01:11:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables
by Jason Glenesk (Code Review) 04 May '21

04 May '21

Attention is currently required from: Felix Held. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52902 ) Change subject: soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia88cb5ea483850a8659f3bae8040c82eb2735d26 Gerrit-Change-Number: 52902 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 05 May 2021 01:08:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp_m: Disable Type-C xDCI
by Bora Guvendik (Code Review) 04 May '21

04 May '21

Attention is currently required from: Anil Kumar K, Selma Bensaid, Paul Menzel, Bernardo Perez Priego. Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52744 ) Change subject: mb/intel/adlrvp_m: Disable Type-C xDCI ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52744 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccdf38111e3961ba887829abfa4146a9b37df9be Gerrit-Change-Number: 52744 Gerrit-PatchSet: 2 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Wed, 05 May 2021 01:04:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/puff/var/dooly: enable touchscreen wakeup
by Tony Huang (Code Review) 04 May '21

04 May '21

Attention is currently required from: Sam McNally, Furquan Shaikh, Tony Huang, Tim Wawrzynczak, Keith Tzeng, Wisley Chen. Hello Sam McNally, build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Edward O'Callaghan, Keith Tzeng, Wisley Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52725 to look at the new patch set (#10). Change subject: mb/google/puff/var/dooly: enable touchscreen wakeup ...................................................................... mb/google/puff/var/dooly: enable touchscreen wakeup Follow touchpad to set interrupt gpio to PAD_CFG_GPI_IRQ_WAKE. BUG=b:186070097 BRANCH=puff TEST=Build and make sure TS works to wakeup suspend/resume. Change-Id: I2bbaab56924849a22a4d05ce53bf5bdcf00265dd Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/hatch/variants/dooly/gpio.c M src/mainboard/google/hatch/variants/dooly/overridetree.cb 2 files changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/52725/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/52725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2bbaab56924849a22a4d05ce53bf5bdcf00265dd Gerrit-Change-Number: 52725 Gerrit-PatchSet: 10 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/intel/adlrvp_m: Disable Type-C xDCI
by Sukumar Ghorai (Code Review) 04 May '21

04 May '21

Attention is currently required from: Anil Kumar K, Selma Bensaid, Paul Menzel, Bernardo Perez Priego. Sukumar Ghorai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52744 ) Change subject: mb/intel/adlrvp_m: Disable Type-C xDCI ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52744/comment/441448c3_eb8199dc PS1, Line 9: Disabling this pci 0d.1 device since it is not required. > Why not required? xDCI is a debug feature to connect the external debugger. Enable XDCI will block the S0ix entry. This is configuration used in all previous platforms for S0ix working in default coreboot, and keep disable the debug interface in default coreboot. -- To view, visit https://review.coreboot.org/c/coreboot/+/52744 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccdf38111e3961ba887829abfa4146a9b37df9be Gerrit-Change-Number: 52744 Gerrit-PatchSet: 2 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Wed, 05 May 2021 01:02:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/amd/majolica: Enable S0i3 by default
by Jason Glenesk (Code Review) 04 May '21

04 May '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Paul Menzel, Felix Held. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52857 ) Change subject: mb/amd/majolica: Enable S0i3 by default ...................................................................... Patch Set 3: (1 comment) File src/mainboard/amd/majolica/devicetree.cb: https://review.coreboot.org/c/coreboot/+/52857/comment/60b59036_5ae8e119 PS2, Line 17: 1 > "true"? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/52857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I808e78f41509cb03821513b5b63cc8856c891d8c Gerrit-Change-Number: 52857 Gerrit-PatchSet: 3 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 05 May 2021 01:02:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/amd/majolica: Enable S0i3 by default
by Jason Glenesk (Code Review) 04 May '21

04 May '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Paul Menzel, Felix Held. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52857 ) Change subject: mb/amd/majolica: Enable S0i3 by default ...................................................................... Patch Set 3: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52857/comment/988336f1_0577ca17 PS2, Line 7: Set S0i3 enabled by default > Maybe: […] Done https://review.coreboot.org/c/coreboot/+/52857/comment/e440e1dd_c08c09f7 PS2, Line 7: mb/amd/majolica:Set > Please add a space after the colon. Done https://review.coreboot.org/c/coreboot/+/52857/comment/3d4a2b72_ed7b79f1 PS2, Line 11: BUG=178728116 > BUG=b:178728116 Done -- To view, visit https://review.coreboot.org/c/coreboot/+/52857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I808e78f41509cb03821513b5b63cc8856c891d8c Gerrit-Change-Number: 52857 Gerrit-PatchSet: 3 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 05 May 2021 01:01:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Marshall Dawson <marshalldawson3rd(a)gmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/amd/majolica: Enable S0i3 by default
by Jason Glenesk (Code Review) 04 May '21

04 May '21

Attention is currently required from: Jason Glenesk, Paul Menzel, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Matt Papageorge, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52857 to look at the new patch set (#3). Change subject: mb/amd/majolica: Enable S0i3 by default ...................................................................... mb/amd/majolica: Enable S0i3 by default Set s0ix_enable to true. BUG=b:178728116 TEST=Cold boot and perform a cycle of S0i3. Signed-off-by: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Change-Id: I808e78f41509cb03821513b5b63cc8856c891d8c --- M src/mainboard/amd/majolica/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/52857/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I808e78f41509cb03821513b5b63cc8856c891d8c Gerrit-Change-Number: 52857 Gerrit-PatchSet: 3 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/i2c/generic: Set S0W to D3hot for wake device
by Keith Tzeng (Code Review) 04 May '21

04 May '21

Attention is currently required from: Tony Huang, Edward O'Callaghan, Wisley Chen. Keith Tzeng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52847 ) Change subject: drivers/i2c/generic: Set S0W to D3hot for wake device ...................................................................... Patch Set 8: (1 comment) Patchset: PS8: could we land this? thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/52847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I34e4b2350875530d3337be700276bcc4fb1f810a Gerrit-Change-Number: 52847 Gerrit-PatchSet: 8 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 05 May 2021 00:57:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit May 2021