Change in coreboot[master]: mb/intel/adlrvp_m: Disable Type-C xDCI

[Sukumar Ghorai (Code Review)]

Attention is currently required from: Anil Kumar K, Selma Bensaid, Paul Menzel, Bernardo Perez Priego.
Sukumar Ghorai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52744 )

Change subject: mb/intel/adlrvp_m: Disable Type-C xDCI
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Patch Set 2:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/52744/comment/441448c3_eb8199dc 
PS1, Line 9: Disabling this pci 0d.1 device since it is not required.
> Why not required?

xDCI is a debug feature to connect the external debugger. Enable XDCI will block the S0ix entry. This is configuration used in all previous platforms for S0ix working in default coreboot, and keep disable the debug interface in default coreboot.