coreboot-gerrit May 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 ...
by Bora Guvendik (Code Review) 13 May '21

13 May '21

Attention is currently required from: Furquan Shaikh, Selma Bensaid, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph. Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54036 ) Change subject: soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwards ...................................................................... Patch Set 2: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/54036/comment/06a9e5ff_ac294d0f PS1, Line 7: WIP > Thanks Furquan, I will fix these. Done File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/54036/comment/041774c9_50bf6172 PS1, Line 135: disable_dimm_upds > This should be renamed to `disable_channel_upds` and the pointers need update too. Done https://review.coreboot.org/c/coreboot/+/54036/comment/b9a5b3fb_98259325 PS1, Line 136: DisableDimmMc0Ch0 > Should be replaced by DisableMc0Ch0, right? I was expecting another patch to take care of that. Done now. https://review.coreboot.org/c/coreboot/+/54036/comment/82bea405_e8b0abdd PS1, Line 164: > nit: Instead of disabling all channels individually above, you can use a flag here: […] Done https://review.coreboot.org/c/coreboot/+/54036/comment/75fe72e8_fbff309e PS1, Line 168: break; > This is wrong. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/54036 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5af11ae99db3bbe3373a9bd4ce36453b58d62fec Gerrit-Change-Number: 54036 Gerrit-PatchSet: 2 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 12 May 2021 23:06:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 ...
by Bora Guvendik (Code Review) 13 May '21

13 May '21

Attention is currently required from: Bora Guvendik, Furquan Shaikh, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph. Hello build bot (Jenkins), Maulik V Vaghela, Selma Bensaid, Tim Wawrzynczak, Ronak Kanabar, Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/54036 to look at the new patch set (#2). Change subject: soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwards ...................................................................... soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwards DisableDimmMc0Ch0 upds changed to DisableMc0Ch0 in new FSP releases. The definition of the upd also changed. Changed FSP meminit code to work based on new definition of the UPDs. Before: 0:Enable both DIMMs, 1:Disable DIMM0, 2:Disable DIMM1, 3:Disable both DIMMs After: 0:Enable, 1:Disable TEST=Boot to OS Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> Change-Id: I5af11ae99db3bbe3373a9bd4ce36453b58d62fec --- M src/soc/intel/alderlake/meminit.c 1 file changed, 14 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/54036/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54036 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5af11ae99db3bbe3373a9bd4ce36453b58d62fec Gerrit-Change-Number: 54036 Gerrit-PatchSet: 2 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/acpi: Add initial support for HMAT
by Tim Wawrzynczak (Code Review) 13 May '21

13 May '21

Attention is currently required from: Anjaneya "Reddy" Chagam, Jonathan Zhang, David Hendricks, Stefan Reinauer, Angel Pons, Subrata Banik. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52047 ) Change subject: src/acpi: Add initial support for HMAT ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52047 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ee60ff990c3cea799c5cbdf7eead818b1bb4f9b Gerrit-Change-Number: 52047 Gerrit-PatchSet: 6 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Wed, 12 May 2021 22:36:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: ec/google/chromeec: OEM variables support for DPTF
by Tim Wawrzynczak (Code Review) 13 May '21

13 May '21

Attention is currently required from: Sumeet R Pawnikar. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54098 ) Change subject: ec/google/chromeec: OEM variables support for DPTF ...................................................................... Patch Set 1: (2 comments) File src/ec/google/chromeec/ec_dptf_helpers.c: https://review.coreboot.org/c/coreboot/+/54098/comment/c15f0dda_d7bcb666 PS1, Line 131: acpigen_write_package(6); : acpigen_write_integer(0); I'm confused as to what this is supposed to do? It doesn't finish writing out this package. https://review.coreboot.org/c/coreboot/+/54098/comment/c715313f_828a1594 PS1, Line 301: ODVP shouldn't this be IETM? -- To view, visit https://review.coreboot.org/c/coreboot/+/54098 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79fbf00521d54e66b6cd7d95b026a76fd3a4394b Gerrit-Change-Number: 54098 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Wed, 12 May 2021 22:32:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/dptf: Add OEM variables support
by Tim Wawrzynczak (Code Review) 13 May '21

13 May '21

Attention is currently required from: Furquan Shaikh, Justin TerAvest, Sumeet R Pawnikar, Todd Broch, Aaron Durbin, Patrick Rudolph, Karthik Ramasubramanian. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50127 ) Change subject: drivers/intel/dptf: Add OEM variables support ...................................................................... Patch Set 8: (2 comments) File src/drivers/intel/dptf/dptf.c: https://review.coreboot.org/c/coreboot/+/50127/comment/604a361b_8bb0a436 PS8, Line 126: dptf_device_hid Just double checking this device should use the same _HID as the DPTF device? I don't think I saw anything mentioned in the BWG. File src/include/acpi/acpigen_dptf.h: https://review.coreboot.org/c/coreboot/+/50127/comment/4573a2af_104332c3 PS8, Line 117: uint8_t oem0; : uint8_t oem1; : uint8_t oem2; : uint8_t oem3; : uint8_t oem4; : uint8_t oem5; : }; suggestion: representing this as an array will simplify the code, e.g. you can use a loop to write out the values. Also IIRC these were DWORDs (uint32_t) not BYTEs (uint8_t)? -- To view, visit https://review.coreboot.org/c/coreboot/+/50127 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf3cf7b40e9a441b41d0c659d76895a58669c2fb Gerrit-Change-Number: 50127 Gerrit-PatchSet: 8 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Todd Broch <tbroch(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Justin TerAvest <teravest(a)chromium.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Todd Broch <tbroch(a)chromium.org> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 12 May 2021 22:30:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/magolor: Select touchscreen based on SSFC in FW_...
by Karthik Ramasubramanian (Code Review) 13 May '21

13 May '21

Attention is currently required from: David Wu, Furquan Shaikh, Henry Sun. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52851 ) Change subject: mb/google/dedede/var/magolor: Select touchscreen based on SSFC in FW_CONFIG ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I087ea677a8865fc8c5b3f7c9773bd7f97924dbb3 Gerrit-Change-Number: 52851 Gerrit-PatchSet: 7 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Comment-Date: Wed, 12 May 2021 22:19:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer/var/volteer2: Configure TCSS OC pins
by Nick Vaccaro (Code Review) 13 May '21

13 May '21

Attention is currently required from: Furquan Shaikh, Zhuohao Lee. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54076 ) Change subject: mb/google/volteer/var/volteer2: Configure TCSS OC pins ...................................................................... Patch Set 4: -Code-Review (1 comment) Patchset: PS4: I've confirmed the issue I'm seeing is not related to this CL. Removing the -1 CR. -- To view, visit https://review.coreboot.org/c/coreboot/+/54076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12da755a1d3b9ec3ed0a2dbfb0782313dd49c7e9 Gerrit-Change-Number: 54076 Gerrit-PatchSet: 4 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Comment-Date: Wed, 12 May 2021 22:03:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OC
by Nick Vaccaro (Code Review) 13 May '21

13 May '21

Attention is currently required from: Tim Wawrzynczak, Zhuohao Lee, Patrick Rudolph. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54075 ) Change subject: soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OC ...................................................................... Patch Set 1: -Code-Review (1 comment) Patchset: PS1: I've confirmed the issue I'm seeing is not related to this CL. Removing the -1 CR. -- To view, visit https://review.coreboot.org/c/coreboot/+/54075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5058a18b1f4d11701cebbba85734fbc279539e52 Gerrit-Change-Number: 54075 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 12 May 2021 22:03:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: add qclib support
by Shelley Chen (Code Review) 12 May '21

12 May '21

Attention is currently required from: Ravi kumar, Martin Roth, mturney mturney, Julius Werner, Sudheer Amrabadi. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50582 ) Change subject: sc7280: add qclib support ...................................................................... Patch Set 35: (1 comment) Patchset: PS35: Ravi, can you please for reference put the qclib version (BOOT.*) and the chipcode revision number for this new qclib blob in the commit message? That way we can easily track it down in case there is a problem. Thank you! -- To view, visit https://review.coreboot.org/c/coreboot/+/50582 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d400f0ad96dbef2e45cc1f11ed17ea95fc60d16 Gerrit-Change-Number: 50582 Gerrit-PatchSet: 35 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Sudheer Amrabadi <samrab(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Sudheer Amrabadi <samrab(a)codeaurora.org> Gerrit-Comment-Date: Wed, 12 May 2021 21:57:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OC
by Nick Vaccaro (Code Review) 12 May '21

12 May '21

Attention is currently required from: Tim Wawrzynczak, Zhuohao Lee, Patrick Rudolph. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54075 ) Change subject: soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OC ...................................................................... Patch Set 1: Code-Review-1 (1 comment) Patchset: PS1: I'm seeing issues that I think may be related to the follow-on patch of this CL that actually sets this UPD. Setting to -1 for now until I verify to assure this does not merge unless we also merge the follow-on CL that requires this change. -- To view, visit https://review.coreboot.org/c/coreboot/+/54075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5058a18b1f4d11701cebbba85734fbc279539e52 Gerrit-Change-Number: 54075 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 12 May 2021 21:26:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit May 2021