coreboot-gerrit May 2021

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Change in coreboot[master]: drivers/intel/dptf: Add OEM variables support
by Sumeet R Pawnikar (Code Review) 12 May '21

12 May '21

Attention is currently required from: Furquan Shaikh, Justin TerAvest, Sumeet R Pawnikar, Todd Broch, Aaron Durbin, Patrick Rudolph, Karthik Ramasubramanian. Hello Lance Zhao, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Justin TerAvest, Tim Wawrzynczak, Todd Broch, Aaron Durbin, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50127 to look at the new patch set (#8). Change subject: drivers/intel/dptf: Add OEM variables support ...................................................................... drivers/intel/dptf: Add OEM variables support This adds OEM variables feature under DPTF as per BWG doc #541817. Using this, platform vendors can expose an array of OEM-specific values to be used in determining DPTF policy. These are obtained via the ODVP method, and then simply exposed under sysfs. In addition, these gets updated when a notification is received or when the DPTF policy is changed by userspace. BRANCH=None BUG=b:187253038 TEST=Built and tested on dedede board Change-Id: Iaf3cf7b40e9a441b41d0c659d76895a58669c2fb Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/acpi/acpigen_dptf.c M src/drivers/intel/dptf/chip.h M src/drivers/intel/dptf/dptf.c M src/include/acpi/acpigen_dptf.h 4 files changed, 45 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/50127/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/50127 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf3cf7b40e9a441b41d0c659d76895a58669c2fb Gerrit-Change-Number: 50127 Gerrit-PatchSet: 8 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Todd Broch <tbroch(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Justin TerAvest <teravest(a)chromium.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Todd Broch <tbroch(a)chromium.org> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/volteer/var/volteer2: Configure TCSS OC pins
by Nick Vaccaro (Code Review) 12 May '21

12 May '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Zhuohao Lee. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54076 ) Change subject: mb/google/volteer/var/volteer2: Configure TCSS OC pins ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/54076/comment/bd70f282_70354e16 PS3, Line 9: volteer > Baseboard sets GPP_E9/USB_OC0# to NF1. […] From what I've fopund, I think we're ok with setting this in baseboard. I'm thinking I should move the setting of GPIO_A16 (USB_OC3#) back into baseboard's gpio.c given all variants set it (and the mated USB_OC0# is currently being set in baseboard's gpio.c) If I'm going to make this change in baseboard's devicetree instead of in each variant's override devicetree, I think moving the setting of GPIO_A16 back into baseboard's gpio.c (and out of each variant's GPIO override table) would be safer and makes sense. Thoughts? -- To view, visit https://review.coreboot.org/c/coreboot/+/54076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12da755a1d3b9ec3ed0a2dbfb0782313dd49c7e9 Gerrit-Change-Number: 54076 Gerrit-PatchSet: 4 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Comment-Date: Wed, 12 May 2021 19:48:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/lenovo/w541: Add Thinkpad W541
by Peter Lemenkov (Code Review) 12 May '21

12 May '21

Attention is currently required from: Alexander Couzens, Patrick Rudolph, amersel. Peter Lemenkov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52659 ) Change subject: mb/lenovo/w541: Add Thinkpad W541 ...................................................................... Patch Set 11: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52659/comment/32b9c1c6_7fd48176 PS9, Line 38: - Each boot takes 20s > Oh actually some progress! This build made libgfxinit work over the mini DP connector, but it still […] Oh, sorry - I do not know what I was thinking of then I've asked you about this. I should have ask for boot log not a build one. Could you please provide a boot log as well? -- To view, visit https://review.coreboot.org/c/coreboot/+/52659 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia43070f51bba3cf59ba9b7d9e29e4e778efbeb08 Gerrit-Change-Number: 52659 Gerrit-PatchSet: 11 Gerrit-Owner: amersel Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: amersel Gerrit-Comment-Date: Wed, 12 May 2021 19:37:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Peter Lemenkov <lemenkov(a)gmail.com> Comment-In-Reply-To: amersel Gerrit-MessageType: comment

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Change in coreboot[master]: mb/lenovo/w541: Add Thinkpad W541
by amersel (Code Review) 12 May '21

12 May '21

Attention is currently required from: Peter Lemenkov, Alexander Couzens, Patrick Rudolph. Hello build bot (Jenkins), Alexander Couzens, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52659 to look at the new patch set (#11). Change subject: mb/lenovo/w541: Add Thinkpad W541 ...................................................................... mb/lenovo/w541: Add Thinkpad W541 Adds support for the Thinkpad W541 based on Peter Lemenkov's initial W541 port. Compiled and tested with SeaBIOS booting into Arch Linux 5.10.32-lts using a VGA BIOS ROM extracted using VBiosFinder. The Haswell mrc.bin blob is required. Tested working: - SATA SSD - SATA DVD drive - All USB ports - Sdcard - Speakers/headphone jack - Keyboard/touchpad - VGA - mini DisplayPort (Thunderbolt untested) - eDP laptop screen - Camera - Smartcard reader - Internal flashing when IFD is unlocked - Thinkpad basic dock - CMOS options - WLAN - Bluetooth - Ethernet - Using me_cleaner Not working: - libgfxinit - Keyboard backlight - Each boot takes 20s Signed-off-by: Amersel <amersel(a)runbox.me> Change-Id: Ia43070f51bba3cf59ba9b7d9e29e4e778efbeb08 --- A src/mainboard/lenovo/w541/Kconfig A src/mainboard/lenovo/w541/Kconfig.name A src/mainboard/lenovo/w541/Makefile.inc A src/mainboard/lenovo/w541/acpi/ec.asl A src/mainboard/lenovo/w541/acpi/platform.asl A src/mainboard/lenovo/w541/acpi/superio.asl A src/mainboard/lenovo/w541/acpi_tables.c A src/mainboard/lenovo/w541/board_info.txt A src/mainboard/lenovo/w541/cmos.default A src/mainboard/lenovo/w541/cmos.layout A src/mainboard/lenovo/w541/data.vbt A src/mainboard/lenovo/w541/devicetree.cb A src/mainboard/lenovo/w541/dsdt.asl A src/mainboard/lenovo/w541/gma-mainboard.ads A src/mainboard/lenovo/w541/gpio.c A src/mainboard/lenovo/w541/hda_verb.c A src/mainboard/lenovo/w541/mainboard.c A src/mainboard/lenovo/w541/romstage.c A src/mainboard/lenovo/w541/smihandler.c 19 files changed, 767 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/52659/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/52659 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia43070f51bba3cf59ba9b7d9e29e4e778efbeb08 Gerrit-Change-Number: 52659 Gerrit-PatchSet: 11 Gerrit-Owner: amersel Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Attention: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/lenovo/w541: Add Thinkpad W541
by amersel (Code Review) 12 May '21

12 May '21

Attention is currently required from: Peter Lemenkov, Alexander Couzens, Patrick Rudolph. amersel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52659 ) Change subject: mb/lenovo/w541: Add Thinkpad W541 ...................................................................... Patch Set 9: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52659/comment/1084b116_f604c948 PS9, Line 38: - Each boot takes 20s > No problem. Here's my complete build log with libgfxinit enabled: https://pastebin.com/ewVtRwyY […] Oh actually some progress! This build made libgfxinit work over the mini DP connector, but it still isn't working on eDP. It was pretty quick before it made it to GRUB, but the SeaBIOS prompt did show up on the top left. -- To view, visit https://review.coreboot.org/c/coreboot/+/52659 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia43070f51bba3cf59ba9b7d9e29e4e778efbeb08 Gerrit-Change-Number: 52659 Gerrit-PatchSet: 9 Gerrit-Owner: amersel Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Attention: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 12 May 2021 18:50:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Peter Lemenkov <lemenkov(a)gmail.com> Comment-In-Reply-To: amersel Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer/var/volteer: add specific wifi SAR for volta
by Tim Wawrzynczak (Code Review) 12 May '21

12 May '21

Attention is currently required from: Nick Vaccaro, Sheng-Liang Pan, YH Lin. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54051 ) Change subject: mb/google/volteer/var/volteer: add specific wifi SAR for volta ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54051 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I000aefca63346c70556688f232ca54360b3badef Gerrit-Change-Number: 54051 Gerrit-PatchSet: 3 Gerrit-Owner: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)chromium.org> Gerrit-Comment-Date: Wed, 12 May 2021 18:47:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/lenovo/w541: Add Thinkpad W541
by amersel (Code Review) 12 May '21

12 May '21

Attention is currently required from: Peter Lemenkov, Alexander Couzens, Patrick Rudolph. amersel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52659 ) Change subject: mb/lenovo/w541: Add Thinkpad W541 ...................................................................... Patch Set 9: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52659/comment/65fa809c_e1989316 PS9, Line 38: - Each boot takes 20s > Could you please provide a full build log. Perhaps someone finds some clues there. No problem. Here's my complete build log with libgfxinit enabled: https://pastebin.com/ewVtRwyY This the config used: https://pastebin.com/3msySCRT -- To view, visit https://review.coreboot.org/c/coreboot/+/52659 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia43070f51bba3cf59ba9b7d9e29e4e778efbeb08 Gerrit-Change-Number: 52659 Gerrit-PatchSet: 9 Gerrit-Owner: amersel Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Attention: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 12 May 2021 18:44:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd: factor out acpigen_write_alib_dptc to common code
by Raul Rangel (Code Review) 12 May '21

12 May '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54077 ) Change subject: soc/amd: factor out acpigen_write_alib_dptc to common code ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54077 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1e2aa1ec728a4e16d3a587d7400cdfc8962f443 Gerrit-Change-Number: 54077 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 12 May 2021 17:59:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne/root_complex: generate DPTC ACPI method
by Raul Rangel (Code Review) 12 May '21

12 May '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54074 ) Change subject: soc/amd/cezanne/root_complex: generate DPTC ACPI method ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdfc056cb325a32d87505dd93e01c9af81dfd6c5 Gerrit-Change-Number: 54074 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 12 May 2021 17:58:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne/chip.h: add DPTC and tablet mode options
by Raul Rangel (Code Review) 12 May '21

12 May '21

Attention is currently required from: Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54073 ) Change subject: soc/amd/cezanne/chip.h: add DPTC and tablet mode options ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54073 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39218b79a79f1ccaf1a58408c6bb5161acea64aa Gerrit-Change-Number: 54073 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 12 May 2021 17:58:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit May 2021