coreboot-gerrit May 2021

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Change in coreboot[master]: mb/adl: Update power limits with SKU specific values
by Sumeet R Pawnikar (Code Review) 29 May '21

29 May '21

Attention is currently required from: Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Rajasekhar Venkatanagapavan, Karthik Ramasubramanian. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54926 ) Change subject: mb/adl: Update power limits with SKU specific values ...................................................................... Patch Set 4: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/54926/comment/edb29cc1_d559a969 PS4, Line 8: > Please state the problem. Something like: […] Ack https://review.coreboot.org/c/coreboot/+/54926/comment/4dabb73b_e58ac7b3 PS4, Line 9: CL 54676 > CB:54676 […] Ack https://review.coreboot.org/c/coreboot/+/54926/comment/8c59442a_1f1e6e44 PS4, Line 10: alderlake > Alder Lake Done https://review.coreboot.org/c/coreboot/+/54926/comment/96075118_34ca73af PS4, Line 11: entries > Singular: entry? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/54926 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80ac9512306006b7cd9a78ae54e3757ec26261b1 Gerrit-Change-Number: 54926 Gerrit-PatchSet: 4 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Rajasekhar Venkatanagapavan <rajasekhar.venkatanagapavan(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rajasekhar Venkatanagapavan <rajasekhar.venkatanagapavan(a)intel.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Sat, 29 May 2021 08:54:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/adl: Add SKU specific power limits support
by Sumeet R Pawnikar (Code Review) 29 May '21

29 May '21

Attention is currently required from: Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Rajasekhar Venkatanagapavan, Patrick Rudolph, Karthik Ramasubramanian. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54676 ) Change subject: soc/intel/adl: Add SKU specific power limits support ...................................................................... Patch Set 6: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/54676/comment/458d6128_cc6940fc PS6, Line 9: depends > depend Ack https://review.coreboot.org/c/coreboot/+/54676/comment/b4ef05a2_29112f44 PS6, Line 11: and > remove Done File src/soc/intel/alderlake/systemagent.c: https://review.coreboot.org/c/coreboot/+/54676/comment/d3d97992_d4a7399a PS6, Line 63: sa_pci_id = sa ? pci_read_config16(sa, PCI_DEVICE_ID) : 0xFFFF; > Move the assignments right before the switch statement? Ack https://review.coreboot.org/c/coreboot/+/54676/comment/2cccdc40_d82672ad PS6, Line 78: */ > You might want to use the concise style: […] Ack https://review.coreboot.org/c/coreboot/+/54676/comment/66406209_73c07e97 PS6, Line 94: "configuration\n", sa_pci_id); > Please put the string on one line. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/54676 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1676e2b4d611cdc85e770f131d5b6d5ecd180be Gerrit-Change-Number: 54676 Gerrit-PatchSet: 6 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rajasekhar Venkatanagapavan <rajasekhar.venkatanagapavan(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rajasekhar Venkatanagapavan <rajasekhar.venkatanagapavan(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Sat, 29 May 2021 08:52:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP]Allow to build romstage sources inside the bootblock
by Angel Pons (Code Review) 29 May '21

29 May '21

Attention is currently required from: Raul Rangel, Furquan Shaikh, Philipp Hug, ron minnich, Subrata Banik, Julius Werner, Arthur Heymans, Andrey Petrov, Aaron Durbin, Patrick Rudolph, Piotr Król, Jason Glenesk, Michał Żygowski, Martin Roth, Marshall Dawson, Ron Minnich, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55068 ) Change subject: [WIP]Allow to build romstage sources inside the bootblock ...................................................................... Patch Set 1: (8 comments) File src/drivers/amd/agesa/def_callouts.c: https://review.coreboot.org/c/coreboot/+/55068/comment/11ebbdb0_e870654a PS1, Line 132: if (!(ENV_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE))) Would defining both `ENV_BOOTBLOCK` and `ENV_ROMSTAGE` for the combined stage work? Or does existing code rely on the assumption that they're mutually exclusive? File src/lib/imd_cbmem.c: https://review.coreboot.org/c/coreboot/+/55068/comment/3e93de02_a22724c1 PS1, Line 210: EARLY_CBMEM_LIST Option seems to be dead. File src/lib/prog_loaders.c: https://review.coreboot.org/c/coreboot/+/55068/comment/9ea27456_d99e524a PS1, Line 4: #include "commonlib/timestamp_serialized.h" Shouldn't this #include use `<>` instead of double quotes? https://review.coreboot.org/c/coreboot/+/55068/comment/74838706_b93693bb PS1, Line 19: #include <romstage_common.h> x86-specific, apparently. File src/soc/amd/common/block/pi/def_callouts.c: https://review.coreboot.org/c/coreboot/+/55068/comment/762c4c23_fe0c651e PS1, Line 25: #if ENV_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE)) > braces {} are not necessary for single statement blocks lolwat File src/southbridge/intel/bd82x6x/early_pch.c: https://review.coreboot.org/c/coreboot/+/55068/comment/818a0258_26eceaf7 PS1, Line 313: if (ENV_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE))) This guard exists because this function is called twice: once in bootblock, once in romstage. I had some patches to clean it up, but they're probably stale by now... src/southbridge/intel/bd82x6x/bootblock.c: early_pch_init(); src/northbridge/intel/sandybridge/romstage.c: early_pch_init(); File src/southbridge/intel/i82801ix/early_init.c: https://review.coreboot.org/c/coreboot/+/55068/comment/864dd6e2_f92b7f99 PS1, Line 50: if (ENV_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE))) Same as bd82x6x, this function is called twice: once in bootblock, once in romstage. This is the case for both users of this southbridge (gm45 and qemu-q35). src/southbridge/intel/i82801ix/bootblock.c: i82801ix_early_init(); src/northbridge/intel/gm45/romstage.c: i82801ix_early_init(); src/mainboard/emulation/qemu-q35/romstage.c: i82801ix_early_init(); File src/southbridge/intel/i82801jx/early_init.c: https://review.coreboot.org/c/coreboot/+/55068/comment/a09d0db0_51e4562f PS1, Line 72: if (ENV_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE))) This one is fine because `i82801jx_early_init` is only called from romstage. Still, the guard is pointless. What's called twice is `i82801jx_setup_bars`. src/northbridge/intel/x4x/romstage.c: i82801jx_early_init(); src/southbridge/intel/i82801jx/early_init.c: i82801jx_setup_bars(); src/southbridge/intel/i82801jx/bootblock.c: i82801jx_setup_bars(); -- To view, visit https://review.coreboot.org/c/coreboot/+/55068 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284 Gerrit-Change-Number: 55068 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)chromium.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Branden Waldner <scruffy99(a)gmail.com> Gerrit-CC: Keith Hui <buurin(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: ron minnich <rminnich(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sat, 29 May 2021 08:30:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: lib/bootmem.c: Use only e820 compatible types
by Paul Menzel (Code Review) 29 May '21

29 May '21

Attention is currently required from: Arthur Heymans. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55069 ) Change subject: lib/bootmem.c: Use only e820 compatible types ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Also see I98e43917c104cc732e8557d1413aab7133aee387 [1] for FILO, it’s actually a bug in Linux: > This seems to be a coreboot or Linux kernel problem though as everything > that is “reserved for future” in ACPI 6.3 Table 15-374 should be mapped > to 2. [1]: https://review.coreboot.org/c/filo/+/51120 SeaBIOS does the remapping already. For GRUB: ``` Date: Mon, 17 May 2021 10:24:36 +0200 Subject: [PATCH] kern/coreboot/mmap: Map to reserved https://git.savannah.gnu.org/cgit/grub.git/commit/?id=6de9ee86bf9ae50967413… Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- grub-core/kern/coreboot/mmap.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/grub-core/kern/coreboot/mmap.c b/grub-core/kern/coreboot/mmap.c index caf8f7cef..2fc316e8d 100644 --- a/grub-core/kern/coreboot/mmap.c +++ b/grub-core/kern/coreboot/mmap.c @@ -59,7 +59,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data) /* Multiboot mmaps match with the coreboot mmap definition. Therefore, we can just pass type through. */ - mem_region->type, + (mem_region->type >= 13) ? 2 : mem_region->type, ctx->hook_data)) return 1; if (start < 0xa0000) @@ -81,7 +81,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data) /* Multiboot mmaps match with the coreboot mmap definition. Therefore, we can just pass type through. */ - mem_region->type, + (mem_region->type >= 13) ? 2 : mem_region->type, ctx->hook_data)) return 1; } -- 2.31.1 ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/55069 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4797ac9dca1a8f43f104654d0e113236205a288a Gerrit-Change-Number: 55069 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sat, 29 May 2021 07:28:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/intel/xeon_sp: add hardware error support (HEST)
by Arthur Heymans (Code Review) 29 May '21

29 May '21

Attention is currently required from: Marc Jones, Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Rocky Phagura, Tim Wawrzynczak, David Hendricks, Angel Pons, Morgan Jang, Patrick Rudolph, Tim Chu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52090 ) Change subject: src/intel/xeon_sp: add hardware error support (HEST) ...................................................................... Patch Set 19: (1 comment) File src/soc/intel/xeon_sp/uncore.c: https://review.coreboot.org/c/coreboot/+/52090/comment/384e9134_775be2b4 PS18, Line 149: * +--------------------------+ cbmem_top : * | HEST ELOG | (CONFIG_ERROR_LOG_BUFFER_SIZE) : * +--------------------------+ > > 1. Done...corrected the map so that HEST ELOG is above cbmem_top. > > 2. Yes, it cannot be part of CBMEM because in the E820 table, CBMEM is labeled as type16 memory (Unknown to the OS) and therefore ACPI drivers fail to acknowledge this memory and generate ACPI errors, unable to load HEST. > > type16? That's probably an error in the Linux trampoline then? It should be type 2. I'll try to figure out what is going on there. Ok https://review.coreboot.org/c/coreboot/+/55069 fixes this. -- To view, visit https://review.coreboot.org/c/coreboot/+/52090 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If76b2af153616182cc053ca878f30fe056e9c8bd Gerrit-Change-Number: 52090 Gerrit-PatchSet: 19 Gerrit-Owner: Rocky Phagura Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Rocky Phagura Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Sat, 29 May 2021 07:23:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rocky Phagura Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Initialize SSPM
by Paul Menzel (Code Review) 29 May '21

29 May '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Yu-Ping Wu. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55051 ) Change subject: soc/mediatek: Initialize SSPM ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/55051/comment/c653e31a_fb788f58 PS2, Line 11: TEST=none Please do, and add how much time it adds to the boot. File src/soc/mediatek/mt8195/Kconfig: https://review.coreboot.org/c/coreboot/+/55051/comment/30567857_b8fb0a26 PS2, Line 32: The file name of the MediaTek SSPM firmware. Maybe add in what path the file is expected in. -- To view, visit https://review.coreboot.org/c/coreboot/+/55051 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia227ea9f7d58129068cb36ec2de7d9feb677006b Gerrit-Change-Number: 55051 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Sat, 29 May 2021 07:23:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: lib/bootmem.c: Use only e820 compatible types
by Arthur Heymans (Code Review) 29 May '21

29 May '21

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55069 ) Change subject: lib/bootmem.c: Use only e820 compatible types ...................................................................... lib/bootmem.c: Use only e820 compatible types With Linuxboot [0-0xfff] and cbmem get marked as type which is not a valid type in the E820 table. Change-Id: I4797ac9dca1a8f43f104654d0e113236205a288a Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/lib/bootmem.c 1 file changed, 10 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/55069/1 diff --git a/src/lib/bootmem.c b/src/lib/bootmem.c index 1fe23c2..c23fa9f 100644 --- a/src/lib/bootmem.c +++ b/src/lib/bootmem.c @@ -43,13 +43,21 @@ case BM_MEM_UNUSABLE: return LB_MEM_UNUSABLE; case BM_MEM_VENDOR_RSVD: - return LB_MEM_VENDOR_RSVD; + /* Use only e820 compatible types */ + if (ARCH_X86) + return LB_MEM_RESERVED; + else + return LB_MEM_VENDOR_RSVD; case BM_MEM_OPENSBI: return LB_MEM_RESERVED; case BM_MEM_BL31: return LB_MEM_RESERVED; case BM_MEM_TABLE: - return LB_MEM_TABLE; + /* Use only e820 compatible types */ + if (ARCH_X86) + return LB_MEM_RESERVED; + else + return LB_MEM_TABLE; default: printk(BIOS_ERR, "ERROR: Unsupported tag %u\n", tag); return LB_MEM_RESERVED; -- To view, visit https://review.coreboot.org/c/coreboot/+/55069 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4797ac9dca1a8f43f104654d0e113236205a288a Gerrit-Change-Number: 55069 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/picasso: remove warm reset flag code
by Paul Menzel (Code Review) 29 May '21

29 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55059 ) Change subject: soc/amd/picasso: remove warm reset flag code ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/55059/comment/e2b142f5_4aabbe40 PS2, Line 11: PPR If there are several revisions, please mention yours, in case it gets updated. -- To view, visit https://review.coreboot.org/c/coreboot/+/55059 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e6df98ffd5d15ca204c9847a76c19c753726737 Gerrit-Change-Number: 55059 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sat, 29 May 2021 07:20:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/blipper: Configure I2C times for touchpad/touchp...
by Paul Menzel (Code Review) 29 May '21

29 May '21

Attention is currently required from: Furquan Shaikh, zanxi chen, Henry Sun, Tao Xia, Karthik Ramasubramanian, Karthikeyan Ramasubramanian. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54249 ) Change subject: mb/google/dedede/var/blipper: Configure I2C times for touchpad/touchpanel/codec ...................................................................... Patch Set 3: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/54249/comment/dd718c95_a2059e25 PS3, Line 15: audio codec RT5682: 385 kHz Do you also have the values before the patch? If yes, please add them too. -- To view, visit https://review.coreboot.org/c/coreboot/+/54249 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8438e37be49f8a74f53fd8460110dac1a3f06993 Gerrit-Change-Number: 54249 Gerrit-PatchSet: 3 Gerrit-Owner: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ginger Zhang <zhangqingchun(a)huaqin.corp-partner.google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-CC: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Sat, 29 May 2021 07:20:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/siemens/{mc_apl2,...,mc_apl6}: Do early UART pad configuration
by Paul Menzel (Code Review) 29 May '21

29 May '21

Attention is currently required from: Mario Scheithauer, Werner Zeh, Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54911 ) Change subject: mb/siemens/{mc_apl2,...,mc_apl6}: Do early UART pad configuration ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/54911/comment/735b0c68_d50a65de PS3, Line 9: With commit 405f2296892c10a48db50cd66c2eb364cde0806e the UART pad > i consider using short git hashes bad practice, since that massively increases the chance of collisi […] Note, in the commit message it’s only for reference, and not for security. Linux takes twelve characters, and depending on the amount of commits in coreboot, a shorter number might be acceptable. It’s a compromise. -- To view, visit https://review.coreboot.org/c/coreboot/+/54911 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If78726d9b141e4e7580cca3267f49c1a5b95d7fa Gerrit-Change-Number: 54911 Gerrit-PatchSet: 4 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sat, 29 May 2021 07:19:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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coreboot-gerrit May 2021