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Change subject: cpu/x86/mp_init: Support both xapic and x2apic with common code
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
Did not test yet, but looked reasonable. Can we add a CONFIG(X2APIC_SUPPORTED) to skip all those is_x2apic_mode() tests inside x86/lapic.h?
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Change subject: lib/bootmem.c: Use only e820 compatible types
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> > This changes linuxbios table entries, not just what results in e820. Eg. […]
Well, SeaBIOS also expects to find LB_MEM_TABLE entry to proceed to copy_table(), though it's called CB_MEM_TABLE there instead.
IMHO the payloads are at fault in not doing a translation; it was never speficied that LB_MEM_xx entries would match with both the e820 and multiboot specifications.
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Change subject: cpu/x86/mp_init: Fix false error message on parking APs twice
......................................................................
Patch Set 2: Code-Review+1
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Change subject: [NOTFORMERGE]link Agesa into bootblock
......................................................................
Patch Set 2:
(1 comment)
File src/drivers/amd/agesa/bootblock.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120285):
https://review.coreboot.org/c/coreboot/+/55070/comment/ffad73e7_9369ff01
PS2, Line 47: void (*ap_romstage_entry)(void) = get_ap_entry_ptr();
function definition argument 'void' should also have an identifier name
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Furquan Shaikh, Marshall Dawson, Patrick Rudolph, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55067
to look at the new patch set (#2).
Change subject: arch/x86: Add a common romstage entry
......................................................................
arch/x86: Add a common romstage entry
It might be possible to have this used for more than x86, but that
will be for a later commit.
Change-Id: I4968364a95b5c69c21d3915d302d23e6f1ca182f
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/x86/Makefile.inc
A src/arch/x86/romstage.c
M src/cpu/intel/car/romstage.c
M src/drivers/amd/agesa/romstage.c
A src/include/romstage_common.h
M src/soc/amd/cezanne/romstage.c
M src/soc/amd/picasso/romstage.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/example/min86/romstage.c
9 files changed, 42 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/55067/2
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Change subject: lib/bootmem.c: Use only e820 compatible types
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> This changes linuxbios table entries, not just what results in e820. Eg. util/cbmem needs to see LB_MEM_TABLE present.
Ah I see. So util/cbmem could be fixed by looking at LB_TAG_CBMEM_ENTRY instead of LB_TAG_MEMORY entries. IDK however if other payloads rely on that API but it looks like it is currently causing more problems than anything else if both FILO and GRUB fix this up (and SeaBIOS already doing that).
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Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55072 )
Change subject: util/cbfstool/Makefile: Check out vboot before trying to use it
......................................................................
util/cbfstool/Makefile: Check out vboot before trying to use it
Change-Id: Ie2044d73b97663f7816964c4d908a46570aafdbc
Signed-off-by: Patrick Georgi <pgeorgi(a)google.com>
---
M util/cbfstool/Makefile
1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/55072/1
diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile
index 7ef46a7..7d7befe 100644
--- a/util/cbfstool/Makefile
+++ b/util/cbfstool/Makefile
@@ -75,3 +75,8 @@
endif
include Makefile.inc
+
+$(objutil)/cbfstool/cbfstool.o: $(VBOOT_SOURCE)/firmware/include/vb2_sha.h
+
+$(VBOOT_SOURCE)/firmware/include/vb2_sha.h:
+ cd $(VBOOT_SOURCE) && git submodule update --init .
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54911 )
Change subject: mb/siemens/{mc_apl2,...,mc_apl6}: Do early UART pad configuration
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/54911/comment/f4eea108_53932f25
PS3, Line 9: With commit 405f2296892c10a48db50cd66c2eb364cde0806e the UART pad
> Note, in the commit message it’s only for reference, and not for security. […]
I agree with Paul here. Even if there was a collision, it wouldn't *really* be a problem, since the headline was given, too. And even if it wasn't and there are three colliding changes, chances are so damn small that these two other changes would be anyhow related. So, the worst thing that could happen is, that someone would have to look at two (three) changes instead of one.
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Change subject: lib/bootmem.c: Use only e820 compatible types
......................................................................
Patch Set 1: Code-Review-2
(1 comment)
Patchset:
PS1:
This changes linuxbios table entries, not just what results in e820. Eg. util/cbmem needs to see LB_MEM_TABLE present.
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Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/55071 )
Change subject: cpu/x86/mp_init: Fix false error message on parking APs twice
......................................................................
cpu/x86/mp_init: Fix false error message on parking APs twice
With Intel TXT APs are parked before LockConfig is called.
With CONFIG_PARALLEL_MP_AP_WORK mp_park_aps() will be called again
before launching the payload, however if APs are already parked this
results in a spurious error message.
Change-Id: I60095cffcb9b31d965b0525ddc3018b592a3e52e
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/cpu/x86/mp_init.c
1 file changed, 10 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/55071/2
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