coreboot-gerrit May 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: drivers/amd/agesa/romstage.c: Remove lapic_id check
by Kyösti Mälkki (Code Review) 29 May '21

29 May '21

Attention is currently required from: Arthur Heymans. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55065 ) Change subject: drivers/amd/agesa/romstage.c: Remove lapic_id check ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55065 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If884001bc8c5363efbbf00422a9a700896318f7b Gerrit-Change-Number: 55065 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Mike Banon <mikebdp2(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sat, 29 May 2021 18:15:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/mp_init: Support both xapic and x2apic with common code
by Kyösti Mälkki (Code Review) 29 May '21

29 May '21

Attention is currently required from: Arthur Heymans. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54753 ) Change subject: cpu/x86/mp_init: Support both xapic and x2apic with common code ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Did not test yet, but looked reasonable. […] CB:55073 -- To view, visit https://review.coreboot.org/c/coreboot/+/54753 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic402940e835d3e2216494740b2d069254eab457d Gerrit-Change-Number: 54753 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sat, 29 May 2021 18:11:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: src/intel/xeon_sp: add hardware error support (HEST)
by Arthur Heymans (Code Review) 29 May '21

29 May '21

Attention is currently required from: Marc Jones, Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Rocky Phagura, Tim Wawrzynczak, David Hendricks, Angel Pons, Morgan Jang, Patrick Rudolph, Tim Chu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52090 ) Change subject: src/intel/xeon_sp: add hardware error support (HEST) ...................................................................... Patch Set 19: (1 comment) File src/soc/intel/xeon_sp/uncore.c: https://review.coreboot.org/c/coreboot/+/52090/comment/d7d37966_b14af60c PS18, Line 149: * +--------------------------+ cbmem_top : * | HEST ELOG | (CONFIG_ERROR_LOG_BUFFER_SIZE) : * +--------------------------+ > > > 1. Done...corrected the map so that HEST ELOG is above cbmem_top. > > > 2. Yes, it cannot be part of CBMEM because in the E820 table, CBMEM is labeled as type16 memory (Unknown to the OS) and therefore ACPI drivers fail to acknowledge this memory and generate ACPI errors, unable to load HEST. > > > > type16? That's probably an error in the Linux trampoline then? It should be type 2. I'll try to figure out what is going on there. > > Ok https://review.coreboot.org/c/coreboot/+/55069 fixes this. Eh try https://review.coreboot.org/c/coreboot/+/55074 -- To view, visit https://review.coreboot.org/c/coreboot/+/52090 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If76b2af153616182cc053ca878f30fe056e9c8bd Gerrit-Change-Number: 52090 Gerrit-PatchSet: 19 Gerrit-Owner: Rocky Phagura Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Rocky Phagura Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Sat, 29 May 2021 18:10:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rocky Phagura Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/bootmem.c: Use only e820 compatible types
by Arthur Heymans (Code Review) 29 May '21

29 May '21

Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/55069 ) Change subject: lib/bootmem.c: Use only e820 compatible types ...................................................................... Abandoned Abandoned in favor of https://review.coreboot.org/c/coreboot/+/55074 -- To view, visit https://review.coreboot.org/c/coreboot/+/55069 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4797ac9dca1a8f43f104654d0e113236205a288a Gerrit-Change-Number: 55069 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: cbfstool/linux_trampoline.S: Fixup the e820 table
by build bot (Jenkins) (Code Review) 29 May '21

29 May '21

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55074 ) Change subject: cbfstool/linux_trampoline.S: Fixup the e820 table ...................................................................... Patch Set 1: (19 comments) File util/cbfstool/linux_trampoline.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/26352015_52017210 PS1, Line 6: 0xcb, 0x0f, 0x84, 0xab, 0x00, 0x00, 0x00, 0x8b, 0x59, 0x04, 0x01, 0xcb, 0x8b, 0x49, 0x14, 0x83, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/08ef6daf_c2e31ccd PS1, Line 6: 0xcb, 0x0f, 0x84, 0xab, 0x00, 0x00, 0x00, 0x8b, 0x59, 0x04, 0x01, 0xcb, 0x8b, 0x49, 0x14, 0x83, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/c196412e_fba9c8a3 PS1, Line 7: 0x3b, 0x11, 0x75, 0x05, 0x8b, 0x4b, 0x08, 0xeb, 0xcf, 0x83, 0x3b, 0x01, 0x75, 0x54, 0x8b, 0x43, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/60997b76_ff30c869 PS1, Line 7: 0x3b, 0x11, 0x75, 0x05, 0x8b, 0x4b, 0x08, 0xeb, 0xcf, 0x83, 0x3b, 0x01, 0x75, 0x54, 0x8b, 0x43, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/6aa1e5b9_07cddaa0 PS1, Line 10: 0x00, 0x89, 0xf0, 0x91, 0x8d, 0x73, 0x08, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0xf3, 0xa5, 0x91, 0xa1, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/53ae1f3c_6b4af2a5 PS1, Line 10: 0x00, 0x89, 0xf0, 0x91, 0x8d, 0x73, 0x08, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0xf3, 0xa5, 0x91, 0xa1, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/80665979_0530043b PS1, Line 11: 0xe8, 0x01, 0x09, 0x00, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0x83, 0xf8, 0x00, 0x74, 0x19, 0x83, 0x7f, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/3799b3c2_4284d0b1 PS1, Line 11: 0xe8, 0x01, 0x09, 0x00, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0x83, 0xf8, 0x00, 0x74, 0x19, 0x83, 0x7f, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/afb4cf66_b667cb1c PS1, Line 12: 0x10, 0x0c, 0x7e, 0x08, 0xba, 0x02, 0x00, 0x00, 0x00, 0x89, 0x57, 0x10, 0x48, 0x83, 0xc7, 0x14, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/5f3d8182_2109123d PS1, Line 12: 0x10, 0x0c, 0x7e, 0x08, 0xba, 0x02, 0x00, 0x00, 0x00, 0x89, 0x57, 0x10, 0x48, 0x83, 0xc7, 0x14, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/85ed62e0_6e730a0c PS1, Line 13: 0xeb, 0xe7, 0x83, 0x3b, 0x12, 0x75, 0x00, 0x03, 0x5b, 0x04, 0x49, 0x75, 0x92, 0xb8, 0x00, 0x00, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/14533cc9_2b692b32 PS1, Line 13: 0xeb, 0xe7, 0x83, 0x3b, 0x12, 0x75, 0x00, 0x03, 0x5b, 0x04, 0x49, 0x75, 0x92, 0xb8, 0x00, 0x00, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/91032a19_35c895ea PS1, Line 14: 0x04, 0x00, 0xc7, 0x40, 0x10, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x40, 0x14, 0x00, 0x9b, 0xcf, 0x00, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/35fee0c8_615bdbd4 PS1, Line 14: 0x04, 0x00, 0xc7, 0x40, 0x10, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x40, 0x14, 0x00, 0x9b, 0xcf, 0x00, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/6fe6ae1c_ef2dd5c1 PS1, Line 15: 0xc7, 0x40, 0x18, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x40, 0x1c, 0x00, 0x93, 0xcf, 0x00, 0xc6, 0x00, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/62235129_64c4d5d3 PS1, Line 15: 0xc7, 0x40, 0x18, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x40, 0x1c, 0x00, 0x93, 0xcf, 0x00, 0xc6, 0x00, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/c6fffe66_b3a73114 PS1, Line 16: 0x2b, 0x89, 0x40, 0x02, 0x0f, 0x01, 0x10, 0xbe, 0x00, 0x00, 0x09, 0x00, 0xff, 0x25, 0x14, 0x02, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/783130d6_134f89c1 PS1, Line 16: 0x2b, 0x89, 0x40, 0x02, 0x0f, 0x01, 0x10, 0xbe, 0x00, 0x00, 0x09, 0x00, 0xff, 0x25, 0x14, 0x02, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120287): https://review.coreboot.org/c/coreboot/+/55074/comment/5d09fe5e_b9cb2a5d PS1, Line 17: 0x09, 0x00, 0xf4, 0xeb, 0xfd please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/55074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0e41c66e002919e41590327afe0f543e0037369 Gerrit-Change-Number: 55074 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 29 May 2021 18:09:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: cbfstool/linux_trampoline.S: Fixup the e820 table
by Arthur Heymans (Code Review) 29 May '21

29 May '21

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55074 ) Change subject: cbfstool/linux_trampoline.S: Fixup the e820 table ...................................................................... cbfstool/linux_trampoline.S: Fixup the e820 table The e820 type don't fully match the LB_TAG_MEMORY types, so change all unknown types to e820 to '2', reserved memory. TESTED with Linuxboot: e820 now shows the CBMEM region as reserved. Change-Id: Ie0e41c66e002919e41590327afe0f543e0037369 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/cbfstool/linux_trampoline.S M util/cbfstool/linux_trampoline.c 2 files changed, 26 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/55074/1 diff --git a/util/cbfstool/linux_trampoline.S b/util/cbfstool/linux_trampoline.S index f1619cf..1b39cc9 100644 --- a/util/cbfstool/linux_trampoline.S +++ b/util/cbfstool/linux_trampoline.S @@ -72,7 +72,21 @@ mov $(LINUX_PARAM_LOC + E820_OFFSET), %edi rep movsl xchg %eax, %ecx -jmp .endScan +/* e820 and LB_TAG_MEMORY type don't fully match: remap unknown type to 2, reserved memory */ +mov (LINUX_PARAM_LOC + E820_NR_OFFSET), %eax +mov $(LINUX_PARAM_LOC + E820_OFFSET), %edi +.test_e820_entry: +cmp $0, %eax +je .endScan +cmp $12, 16(%edi) /* type */ +jng .next_e820_entry +/* Fixup the type to 2, reserved memory */ +mov $2, %edx +mov %edx, 16(%edi) +.next_e820_entry: +dec %eax +add $20, %edi +jmp .test_e820_entry .testFramebuffer: cmp $CB_TAG_FRAMEBUFFER, (%ebx) diff --git a/util/cbfstool/linux_trampoline.c b/util/cbfstool/linux_trampoline.c index 17588cb..29edc71 100644 --- a/util/cbfstool/linux_trampoline.c +++ b/util/cbfstool/linux_trampoline.c @@ -3,15 +3,17 @@ unsigned char trampoline[] = { 0xfc, 0x31, 0xd2, 0xb9, 0x00, 0x00, 0x00, 0x00, 0xbb, 0x00, 0x00, 0x01, 0x00, 0x01, 0xcb, 0x8b, 0x01, 0x3d, 0x4c, 0x42, 0x49, 0x4f, 0x74, 0x07, 0x83, 0xc1, 0x10, 0x39, 0xcb, 0x75, 0xe9, 0x39, - 0xcb, 0x0f, 0x84, 0x8a, 0x00, 0x00, 0x00, 0x8b, 0x59, 0x04, 0x01, 0xcb, 0x8b, 0x49, 0x14, 0x83, - 0x3b, 0x11, 0x75, 0x05, 0x8b, 0x4b, 0x08, 0xeb, 0xcf, 0x83, 0x3b, 0x01, 0x75, 0x33, 0x8b, 0x43, + 0xcb, 0x0f, 0x84, 0xab, 0x00, 0x00, 0x00, 0x8b, 0x59, 0x04, 0x01, 0xcb, 0x8b, 0x49, 0x14, 0x83, + 0x3b, 0x11, 0x75, 0x05, 0x8b, 0x4b, 0x08, 0xeb, 0xcf, 0x83, 0x3b, 0x01, 0x75, 0x54, 0x8b, 0x43, 0x04, 0x83, 0xe8, 0x08, 0xc1, 0xe8, 0x02, 0x3d, 0xa0, 0x00, 0x00, 0x00, 0x7e, 0x05, 0xb8, 0xa0, 0x00, 0x00, 0x00, 0x89, 0xc6, 0xbf, 0x05, 0x00, 0x00, 0x00, 0xf7, 0xf7, 0xa3, 0xe8, 0x01, 0x09, - 0x00, 0x89, 0xf0, 0x91, 0x8d, 0x73, 0x08, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0xf3, 0xa5, 0x91, 0xeb, - 0x05, 0x83, 0x3b, 0x12, 0x75, 0x00, 0x03, 0x5b, 0x04, 0x49, 0x75, 0xb3, 0xb8, 0x00, 0x00, 0x04, - 0x00, 0xc7, 0x40, 0x10, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x40, 0x14, 0x00, 0x9b, 0xcf, 0x00, 0xc7, - 0x40, 0x18, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x40, 0x1c, 0x00, 0x93, 0xcf, 0x00, 0xc6, 0x00, 0x2b, - 0x89, 0x40, 0x02, 0x0f, 0x01, 0x10, 0xbe, 0x00, 0x00, 0x09, 0x00, 0xff, 0x25, 0x14, 0x02, 0x09, - 0x00, 0xf4, 0xeb, 0xfd + 0x00, 0x89, 0xf0, 0x91, 0x8d, 0x73, 0x08, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0xf3, 0xa5, 0x91, 0xa1, + 0xe8, 0x01, 0x09, 0x00, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0x83, 0xf8, 0x00, 0x74, 0x19, 0x83, 0x7f, + 0x10, 0x0c, 0x7e, 0x08, 0xba, 0x02, 0x00, 0x00, 0x00, 0x89, 0x57, 0x10, 0x48, 0x83, 0xc7, 0x14, + 0xeb, 0xe7, 0x83, 0x3b, 0x12, 0x75, 0x00, 0x03, 0x5b, 0x04, 0x49, 0x75, 0x92, 0xb8, 0x00, 0x00, + 0x04, 0x00, 0xc7, 0x40, 0x10, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x40, 0x14, 0x00, 0x9b, 0xcf, 0x00, + 0xc7, 0x40, 0x18, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x40, 0x1c, 0x00, 0x93, 0xcf, 0x00, 0xc6, 0x00, + 0x2b, 0x89, 0x40, 0x02, 0x0f, 0x01, 0x10, 0xbe, 0x00, 0x00, 0x09, 0x00, 0xff, 0x25, 0x14, 0x02, + 0x09, 0x00, 0xf4, 0xeb, 0xfd }; -unsigned int trampoline_len = 180; +unsigned int trampoline_len = 213; -- To view, visit https://review.coreboot.org/c/coreboot/+/55074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0e41c66e002919e41590327afe0f543e0037369 Gerrit-Change-Number: 55074 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: *x86: fix x2apic mode boot issue
by Kyösti Mälkki (Code Review) 29 May '21

29 May '21

Attention is currently required from: Wonkyu Kim. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52696 ) Change subject: *x86: fix x2apic mode boot issue ...................................................................... Patch Set 6: (4 comments) Patchset: PS6: Also CB:55073 File src/include/cpu/x86/lapic.h: https://review.coreboot.org/c/coreboot/+/52696/comment/b6d74826_ce971a94 PS6, Line 109: void stop_this_cpu(void); Has LAPIC_ICR references. https://review.coreboot.org/c/coreboot/+/52696/comment/a67613e8_4c004ac1 PS6, Line 124: # define lapic_write_around(x, y) lapic_write_atomic((x), (y)) Looks like lapic_write_around() does not support x2apic? https://review.coreboot.org/c/coreboot/+/52696/comment/17abb7e5_b1a2587d PS6, Line 137: lapic_virtual_wire_mode_init(); This will call lapic_write_around(). -- To view, visit https://review.coreboot.org/c/coreboot/+/52696 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia28f60a077182c3753f6ba9fbdd141f951d39b37 Gerrit-Change-Number: 52696 Gerrit-PatchSet: 6 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Comment-Date: Sat, 29 May 2021 18:05:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP] cpu/x86: Add Kconfig X2APIC SUPPORT
by Kyösti Mälkki (Code Review) 29 May '21

29 May '21

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55073 ) Change subject: [WIP] cpu/x86: Add Kconfig X2APIC_SUPPORT ...................................................................... [WIP] cpu/x86: Add Kconfig X2APIC_SUPPORT Allows compile-time optimisation on platforms that do not wish to enable runtime checking of X2APIC_ENABLED. Legacy lapic_cpu_init() is incompatible so there is dependency on PARALLEL_MP. Also stop_this_cpu() is incompatible, so there is dependency on !AP_IN_SIPI_WAIT. Change-Id: I8269f9639ee3e89a2c2b4178d266ba2dac46db3f Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/x86/Kconfig M src/include/cpu/x86/lapic.h 2 files changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/55073/1 diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index bcaf0bf..ad53229 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -17,6 +17,13 @@ Allow APs to do other work after initialization instead of going to sleep. +config X2APIC_SUPPORT + bool + depends on PARALLEL_MP + depends on !AP_IN_SIPI_WAIT + help + Add support for X2_APIC mode. + config UDELAY_LAPIC bool default n diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index 717fc9a..1d43b5f 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -10,6 +10,9 @@ static inline bool is_x2apic_mode(void) { + if (!CONFIG(X2APIC_SUPPORT)) + return false; + msr_t msr; msr = rdmsr(LAPIC_BASE_MSR); return ((msr.lo & LAPIC_BASE_X2APIC_ENABLED) == LAPIC_BASE_X2APIC_ENABLED); -- To view, visit https://review.coreboot.org/c/coreboot/+/55073 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8269f9639ee3e89a2c2b4178d266ba2dac46db3f Gerrit-Change-Number: 55073 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/guybrush: Unassign I2C1 and set GPIOs to input/no-pull
by Martin Roth (Code Review) 29 May '21

29 May '21

Martin Roth has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/55022 ) Change subject: mb/google/guybrush: Unassign I2C1 and set GPIOs to input/no-pull ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/55022 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I244b398c695683fa4e217d83aa0498bcd8f0fbbe Gerrit-Change-Number: 55022 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: lib/bootmem.c: Use only e820 compatible types
by Arthur Heymans (Code Review) 29 May '21

29 May '21

Attention is currently required from: Kyösti Mälkki. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55069 ) Change subject: lib/bootmem.c: Use only e820 compatible types ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Well, SeaBIOS also expects to find LB_MEM_TABLE entry to proceed to copy_table(), though it's called CB_MEM_TABLE there instead. > > IMHO the payloads are at fault in not doing a translation; it was never speficied that LB_MEM_xx entries would match with both the e820 and multiboot specifications. Ok fair point. I'll try to fixup x86 linux trampoline. -- To view, visit https://review.coreboot.org/c/coreboot/+/55069 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4797ac9dca1a8f43f104654d0e113236205a288a Gerrit-Change-Number: 55069 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Sat, 29 May 2021 17:31:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit May 2021