Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49470 )
Change subject: soc/intel/common/graphics: Add new Kconfig SOC_INTEL_DISABLE_IGD
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS6:
ugh. another global kconfig that is only used on TWO platforms but shown in menuconfig for EVERY platform in soc/intel .... srsly?!
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Change subject: QC SOCs: update code moved to common/
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Patch Set 7: Code-Review+2
(1 comment)
Patchset:
PS7:
Looks good once you update the message
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51332 )
Change subject: soc/intel/skylake: detect if IGD is present
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Patch Set 7:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/51332/comment/e62979fc_c8e822ab
PS7, Line 10: FSP-S will hang indefinitely.
explain how this is actually fixed, please
https://review.coreboot.org/c/coreboot/+/51332/comment/2c9e2cf7_28dfdea2
PS7, Line 13: x11ssh-ln4f
you can add x11ssm-f, too, here. I've verified the bug and your fix there
File src/soc/intel/skylake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/51332/comment/a895598c_b2b0af67
PS7, Line 119: igd = pci_read_config16(SA_DEVFN_IGD, PCI_VENDOR_ID) == PCI_VENDOR_ID_INTEL;
just a side note: actually, the check isn't required here, since FSP checks if IGD is fused disabled and skips graphics init
https://review.coreboot.org/c/coreboot/+/51332/comment/75568120_0abdc8ca
PS7, Line 117: dev = pcidev_path_on_root(SA_DEVFN_IGD);
: if (dev && dev->enabled) {
: igd = pci_read_config16(SA_DEVFN_IGD, PCI_VENDOR_ID) == PCI_VENDOR_ID_INTEL;
:
this is used twice - here and in systemagent.c. what about moving it to a helper function to not repeat yourself? :)
File src/soc/intel/skylake/romstage/systemagent.c:
https://review.coreboot.org/c/coreboot/+/51332/comment/5d0c45c8_149950eb
PS7, Line 31:
: if (igd_dev && igd_dev->enabled &&
: pci_read_config16(SA_DEVFN_IGD, PCI_VENDOR_ID) == PCI_VENDOR_ID_INTEL)
: sa_set_mch_bar(&soc_gfxvt_mmio_descriptor, 1);
:
there's another occurence of this in src/soc/intel/skylake/systemagent.c, which probably should be guarded as well
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Change subject: mb/system76/oryp6: Add System76 Oryx Pro 6
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Set Ready For Review
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Nikolai Vyssotski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51957 )
Change subject: [WIP] mb/google/guybrush: add DXIO and DDI descriptors
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Patch Set 4:
(1 comment)
File src/mainboard/google/guybrush/port_descriptors.c:
https://review.coreboot.org/c/coreboot/+/51957/comment/80410349_29776b11
PS3, Line 55: DDI_DP
> oh, i meant https://review.coreboot.org/c/coreboot/+/51948/1/src/soc/amd/cezanne/fsp_m_…. […]
Ok, but my previous comment still stands. I don't think this was right for Guybrush
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