Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52007 )
Change subject: google/trogdor: Don't build for rev0 by default
......................................................................
google/trogdor: Don't build for rev0 by default
We've mostly stopped using Trogdor-rev0 now and are starting to bring up
rev2 instead. Therefore, the default revisions this builds for should be
the newer ones.
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Change-Id: Ie433ebb2a03fb1636b5012b4a0567ba6f982579d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52007
Reviewed-by: Doug Anderson <dianders(a)chromium.org>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/mainboard/google/trogdor/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Doug Anderson: Looks good to me, approved
diff --git a/src/mainboard/google/trogdor/Kconfig b/src/mainboard/google/trogdor/Kconfig
index acf5b5f..5538205 100644
--- a/src/mainboard/google/trogdor/Kconfig
+++ b/src/mainboard/google/trogdor/Kconfig
@@ -5,7 +5,6 @@
if BOARD_GOOGLE_TROGDOR_COMMON
config TROGDOR_REV0
- def_bool y if BOARD_GOOGLE_TROGDOR
def_bool n
config TROGDOR_HAS_FINGERPRINT
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Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51523 )
Change subject: mb/google/zork/var/shuboz: update USB OC pin mapping
......................................................................
Patch Set 5:
(1 comment)
File src/mainboard/google/zork/variants/shuboz/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/51523/comment/68870d46_0cadb737
PS5, Line 28: register "usb_port_overcurrent_pin[1]" = "USB_OC_PIN_0" # USB A0
> Dear Kangheui, […]
Got it, but why usb_port_overcurrent_pin[2] is USB_OC_NONE? Isn't it connected to USB A1?
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Change subject: *x86: Support x2apic mode
......................................................................
Patch Set 6:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/51723/comment/3a0b4766_fdc9916d
PS5, Line 7: src/*/x86 :
> 1. Please remove the space before the colon. […]
Done
https://review.coreboot.org/c/coreboot/+/51723/comment/ca7efc1d_3bdbc003
PS5, Line 9: Implement x2apic mode as existing code only supports apic mode
> 1. Please add dot/period to the end of sentences. […]
Done
https://review.coreboot.org/c/coreboot/+/51723/comment/205d6d67_c3d3e562
PS5, Line 14: cat /proc/cpuinfo | grep "apicid"
> On what board? […]
example log is attached. Board is new platform which is not upstreammed yet. Will be upstreammed once we get legal approval.
File src/cpu/x86/lapic/lapic.c:
https://review.coreboot.org/c/coreboot/+/51723/comment/cbe7e526_4de3b3cc
PS5, Line 50: printk(BIOS_DEBUG, " apic_id: 0x%x ", lapicid());
> Why does this need to be changed?
x2apic is 16bit while apic is 8bit
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Change subject: google/trogdor: Don't build for rev0 by default
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Can we land this? ...and pick to all the relevant branches?
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Hello Lance Zhao, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Jamie Ryu, Ravishankar Sarawadi, Subrata Banik, Srinidhi N Kaushik, Raj Astekar, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51723
to look at the new patch set (#6).
Change subject: *x86: Support x2apic mode
......................................................................
*x86: Support x2apic mode
Implement x2apic mode as existing code only supports apic mode.
Use info from LAPIC_BASE_MSR(LAPIC_BASE_MSR_X2APIC_MODE) to check
if apic mode or x2apic mode and implment x2apic mode according to
x2apic specfication.
Reference:
https://software.intel.com/content/www/us/en/develop/download/
intel-64-architecture-x2apic-specification.html
BUG=None
BRANCH=None
TEST=boot to OS and check apic mode
cat /proc/cpuinfo | grep "apicid"
ex) can see apicid bigger than 255
apicid : 256
apicid : 260
Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com>
Change-Id: I0bb729b0521fb9dc38b7981014755daeaf9ca817
---
M src/arch/x86/cpu.c
M src/cpu/x86/lapic/lapic.c
M src/cpu/x86/lapic/lapic_cpu_init.c
M src/cpu/x86/mp_init.c
M src/cpu/x86/smm/smm_stub.S
M src/include/cpu/x86/lapic.h
M src/include/cpu/x86/lapic_def.h
M src/include/cpu/x86/smm.h
8 files changed, 296 insertions(+), 188 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/51723/6
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Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51976 )
Change subject: tests: Add lib/uuid-test test case
......................................................................
Patch Set 3: Code-Review+2
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Francois Toguo Fotso has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51353 )
Change subject: mb/intel/aldrvp: Update iDisp Link UPD settings
......................................................................
Patch Set 9:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/51353/comment/6d1fac31_24fe5e03
PS6, Line 9: These UPD values are automatically set by the FSP.
> > Not quite sure I understand the rational in "..common code should set UPDs as follows.." . […]
Sounds. We are back to the changes as originally pushed in patchset1.
Sathya and I will look into adding the finding and adding what determines the settings of UPDs. Most likely in a separated CL.
Patchset:
PS9:
CL ready.
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51838 )
Change subject: lint: checkpatch: Add SUSPICIOUS_CODE_INDENT test
......................................................................
Patch Set 2:
(7 comments)
Patchset:
PS2:
Hi, hmmm, thought I'd give it a quick look and then... all the
comments. Let me know if I should move that to the LKML.
File util/lint/checkpatch.pl:
https://review.coreboot.org/c/coreboot/+/51838/comment/a37a0834_b8ed86f8
PS2, Line 1345: @stack = (['', 0]) if ($#stack == -1);
Looks like this wouldn't be needed anymore? With the new index checks,
it would never be accessed, right?
Removing it would change the condition to `$#stack >= 0`, I guess.
https://review.coreboot.org/c/coreboot/+/51838/comment/fcb4bd3e_d3a5f0d0
PS2, Line 1553: $level = $stack[$#stack - 1];
Looks like this suffers the same?
https://review.coreboot.org/c/coreboot/+/51838/comment/55345311_1ab1004a
PS2, Line 3629: s
The `s` modifier looks suspicious. AIUI, it means the `.` could match
a `\n` too. So in a string like "\n\n+\n" we'd remove the second `\n`
and miss to remove the `+`.
I guess that wont't happen because it would be invalid input, but I
also don't see what we need the `s` for.
https://review.coreboot.org/c/coreboot/+/51838/comment/98c41224_22a3a795
PS2, Line 3638: \s*
Is there a point to match preceding whitespace if we don't match from the start?
https://review.coreboot.org/c/coreboot/+/51838/comment/026d10b4_399c788b
PS2, Line 3642: \s*?
I couldn't find any example where this matches.
First, it seems matching the start should be done with `\n`, not `^`, or we'd
need the `m` modifier, I guess. I don't know why, the expressions above seem
assume that too, though. But what's the point of the substitution? The only
thing that is allowed to follow is a semicolon, AFAICS. If we continue, we'd
check if a semicolon at the start of a line (because we just dropped all the
indentation) is too much indented...
Also, why should we not warn if this is oddly indented?
If we don't want to warn, we should simply skip it `if ($stat =~ /\bdo\b/)`.
Or is there anything else that could follow a `do {}`?
If we want to warn, I don't see why we should patch it.
https://review.coreboot.org/c/coreboot/+/51838/comment/16d6370b_29963c02
PS2, Line 3663: stat_real
Nit, somehow $stat_real is missing the closing brace (if it was a block with braces).
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