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Change subject: [WIP] mb/amd/majolica: add DXIO and DDI descriptors
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS6:
setting all devices and functions to 0 so that the fsp will pick a working default and enabling all possible devices in the devicetree didn't fix that none of the devices shows up
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Hello build bot (Jenkins), Raul Rangel, Martin Roth, Mathew King, Bhanu Prakash Maiya,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/guybrush: Add Bluetooth configuration
......................................................................
mb/google/guybrush: Add Bluetooth configuration
Configure the BT disable GPIO to logic low in order to enable Bluetooth.
Add USB ACPI configuration for BT device.
BUG=b:182201890
TEST=Build and boot to OS.
Change-Id: I647c301e2db6d4a7c5c8cb31cbc47a44cba5e734
---
M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
M src/mainboard/google/guybrush/variants/baseboard/gpio.c
2 files changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/51963/4
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Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52045 )
Change subject: [WIP] mb/amd/majolica: add PCIe devices to devicetree
......................................................................
[WIP] mb/amd/majolica: add PCIe devices to devicetree
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I838aeda2e6c403eaa3388a6b934e7ab6b4e918e3
---
M src/mainboard/amd/majolica/devicetree.cb
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/52045/1
diff --git a/src/mainboard/amd/majolica/devicetree.cb b/src/mainboard/amd/majolica/devicetree.cb
index 5efe709..088b259 100644
--- a/src/mainboard/amd/majolica/devicetree.cb
+++ b/src/mainboard/amd/majolica/devicetree.cb
@@ -15,6 +15,13 @@
}"
device domain 0 on
+ device ref gpp_gfx_bridge_0 on end # MXM
+ device ref gpp_bridge_0 on end # NVMe
+ device ref gpp_bridge_1 on end
+ device ref gpp_bridge_2 on end # WWAN
+ device ref gpp_bridge_3 on end # LAN
+ device ref gpp_bridge_4 on end # WLAN
+ device ref gpp_bridge_5 on end
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
device ref gfx on end # Internal GPU (GFX)
device ref xhci_0 on # USB 3.1 (USB0)
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Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Matt Papageorge,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51956
to look at the new patch set (#6).
Change subject: [WIP] mb/amd/majolica: add DXIO and DDI descriptors
......................................................................
[WIP] mb/amd/majolica: add DXIO and DDI descriptors
TODO: The devices and function numbers of the PCIe bridges still need to
be tested. The values used in the Majolica UEFI reference implementation
weren't consistent with the PPR.
This doesn't seem to work yet :(
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Signed-off-by: Matt Papageorge <matthewpapa07(a)gmail.com>
Change-Id: I65c7e0ebf1e43fd4608d46bae8a176cfc3d0236b
---
M src/mainboard/amd/majolica/port_descriptors.c
1 file changed, 111 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/51956/6
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Change subject: supermicro/x11: enable COMB via LPC
......................................................................
Patch Set 1:
(1 comment)
This change is ready for review.
Patchset:
PS1:
working on x11ssm-f. however, I couldn't reproduce that behaviour of ttyS0 + ttyS1 being forwarded via SOL as you mentioned on IRC. only ttyS1 gets forwarded for me
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Change subject: [WIP] mb/amd/majolica: add DXIO and DDI descriptors
......................................................................
Patch Set 5:
(1 comment)
File src/mainboard/amd/majolica/port_descriptors.c:
https://review.coreboot.org/c/coreboot/+/51956/comment/55181c8c_155e6f9e
PS5, Line 27: .clk_req = CLK_REQ5,
.gpio_group_id = 26,
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