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Change subject: soc/amd/common/espi: Reset eSPI registers to known state
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Patch Set 5: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52058/comment/42dd70c6_461cf312
PS2, Line 9: This sets the eSPI registers to the reset values specified in the PPR.
:
: On Cezanne, the PSP modifies these registers such that the eSPI
> The PSP writes port 80s to signal where it in the boot processes. i.e. […]
Ack.
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Change subject: soc/amd: Make espi_clear_decodes private
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Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52064/comment/146f2207_f4c074a3
PS1, Line 10: change consolidates the clear logic into one spot.
I think it would be good to mention here that this changes the behavior for Picasso since the decodes weren't cleared before. But, that shouldn't really have any impact as decodes are again set up as per the mainboard configuration.
Just thinking out loud:
* In case where verstage runs on PSP, verstage clears eSPI decodes and sets up as per mainboard configuration. Once PSP is done, x86 will clear decodes and reconfigure as per mainboard configuration.
* In case where verstage does not run on PSP, x86 will clear decodes and reconfigure as per mainboard configuration.
In both cases, the corresponding first stage on the PSP/x86 sets things up correctly before using it.
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Change subject: Clean up after SIGHUP
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Patch Set 1: Code-Review+1
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Change subject: device/Kconfig: Adapt PCIEXP_HOTPLUG_BUSES
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Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
PS1:
Was said on IRC:
> don't merge this without the parent commits
This is because the linter will complain otherwise. Leaving this comment unresolved to avoid out-of-order submission.
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Change subject: util/kconfig_lint: Turn handle_expressions() into a parser
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Change subject: util/kconfig_lint: Drop exception for paths without quotes
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