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Hello build bot (Jenkins), Nico Huber, Peter Lemenkov, Angel Pons, Alexander Couzens, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51612
to look at the new patch set (#5).
Change subject: mb/lenovo/t420: Copy HDA verbs from vendor firmware
......................................................................
mb/lenovo/t420: Copy HDA verbs from vendor firmware
Background story (I think that's what great in opensource -
ppl leave there part of their lives): ;-)
While trying to fix audio jack not working with coreboot and
Windows 10 with some help from hell__ and nico_h on IRC nico_h
discovered that t420 and t430 hda_verb.c are the same:
<nico_h> oddly, in coreboot source T420 and T430 have the same
numbers for very different codecs... I suspect copy-pasta
Difference between /sys/class/sound/cardX/hwCXDY/init_pin_config
in vendor BIOS helped with the updated config. Connecting audio
jack now works flawless both in Linux and Windows.
Audio-related keyboard buttons: volup, voldown, mute works fine
both in Linux (Debian-based) and Windows 10. mutemic button works
(tested ie. with xev) but both in Linux and Windows 10 wont light
up or makes any effect.
+-----------------------------------+
| init_pin_config dump from: |
+----= VENDOR =---+---= coreboot =--+
| 0x19 0x04211040 | 0x19 0x04211040 |
| 0x1a 0x61a19050 | 0x1a 0x61a19050 |
| 0x1b 0x04a11060 | 0x1b 0x04a11060 |
| 0x1c 0x6121401f | 0x1c 0x6121401f |
| 0x1d 0x40f001f0 | 0x1d 0x40f001f0 |
| 0x1e 0x40f001f0 | 0x1e 0x40f001f0 |
| 0x1f 0x90170110 | 0x1f 0x90170110 |
| 0x20 0x40f001f0 | 0x20 0x40f001f0 |
| 0x22 0x40f001f0 | 0x22 0x40f001f0 |
| 0x23 0x90a60170 | 0x23 0x90a60170 |
+-----------------+-----------------+
Tested-by: Piotr Szymaniak
Signed-off-by: Piotr Szymaniak <szarpaj(a)grubelek.pl>
Change-Id: Ie5eba84e5ea590b7db00e189cd68e714bee7e410
---
M src/mainboard/lenovo/t420/hda_verb.c
1 file changed, 20 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/51612/5
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52061 )
Change subject: spd.h: Move `DIMMx` macros to i440bx/raminit.h
......................................................................
Patch Set 2:
(1 comment)
File src/northbridge/intel/i440bx/raminit.h:
https://review.coreboot.org/c/coreboot/+/52061/comment/cb44b27d_70df40f8
PS2, Line 9: /* DIMM SPD addresses */
: #define DIMM0 0x50
:
> are dimm addresses common or controller/platform specific? if common, what about defining them at a […]
They're mainboard-specific
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Change subject: nb/intel/i945/raminit.c: Replace `DIMM0`
......................................................................
Patch Set 1:
(1 comment)
File src/northbridge/intel/i945/raminit.c:
https://review.coreboot.org/c/coreboot/+/52073/comment/e31a2fa7_f6bfc467
PS1, Line 48: 0x50
> hm, is that really "more informative"? I'd keep DIMM0
There's no rule saying that SPD index 0x50 is DIMM0. On BTX mainboards, DIMM0's SPD is often at address 0x53.
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Change subject: nb/intel/i945: Refactor `dump_spd_registers` function
......................................................................
Patch Set 4:
(1 comment)
File src/northbridge/intel/i945/debug.c:
https://review.coreboot.org/c/coreboot/+/51899/comment/1f06d9d4_6e762b96
PS4, Line 63: const unsigned int device = spd_map[d];
> nit: needed?
I didn't want to replace all instances of `device` with the more-cryptic `spd_map[d]`
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Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49887 )
Change subject: docs/mb/supermicro: add SUM tool for flashing with disabled ME
......................................................................
docs/mb/supermicro: add SUM tool for flashing with disabled ME
Change-Id: I08543c0908a6cb4ef9fb46d0eb3a7aa481fb95d9
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49887
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
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---
M Documentation/mainboard/supermicro/flashing_on_vendorbmc.md
1 file changed, 12 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Angel Pons: Looks good to me, approved
diff --git a/Documentation/mainboard/supermicro/flashing_on_vendorbmc.md b/Documentation/mainboard/supermicro/flashing_on_vendorbmc.md
index e02c57b..c831302 100644
--- a/Documentation/mainboard/supermicro/flashing_on_vendorbmc.md
+++ b/Documentation/mainboard/supermicro/flashing_on_vendorbmc.md
@@ -30,3 +30,15 @@
Make sure that the ME isn't in recovery mode, otherwise you get an error
message on updating the BIOS.
+
+## Flashing with disabled ME
+
+If ME is disabled via `me_cleaner` or the ME recovery jumper, it is still
+possible to flash remotely with the [`Supermicro Update Manager`](SUM) (`SUM`).
+
+```sh
+./sum -i <remote BMC IP> -u <user> -p <password> -c UpdateBios --reboot \
+ --force_update --file build/coreboot.rom
+```
+
+[SUM]: https://www.supermicro.com/SwDownload/SwSelect_Free.aspx?cat=SUM
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Change subject: drivers/intel/fsp1_1: Drop dead MMA code
......................................................................
Patch Set 2: Code-Review+2
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Change subject: spd.h: Move `DIMMx` macros to i440bx/raminit.h
......................................................................
Patch Set 2:
(1 comment)
File src/northbridge/intel/i440bx/raminit.h:
https://review.coreboot.org/c/coreboot/+/52061/comment/68b635c6_5990db92
PS2, Line 9: /* DIMM SPD addresses */
: #define DIMM0 0x50
:
are dimm addresses common or controller/platform specific? if common, what about defining them at a common place?
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