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Hello build bot (Jenkins), Nico Huber, Subrata Banik, Arthur Heymans, Michael Niewöhner, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52100
to look at the new patch set (#2).
Change subject: soc/intel: Hook up `SOC_INTEL_DISABLE_IGD` to `InternalGfx` UPD
......................................................................
soc/intel: Hook up `SOC_INTEL_DISABLE_IGD` to `InternalGfx` UPD
Commit 0591348833f730a42e74039d8e2d957ec94a39d5 introduced this Kconfig
option inside soc/intel/common scope. However, it was only hooked up in
commit d74cd60b8159c3928dba318e6387f200ff3bb0e7 for Alder Lake, and in
commit 99157c1f4a80556462ca22a4ade87b2c8d09e674 for Tiger Lake. Hook up
the `SOC_INTEL_DISABLE_IGD` Kconfig option to all other platforms which
have the `InternalGfx` UPD.
Change-Id: Icd1379a835b445a6d4b028ebde5a3e355ee5b67b
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M src/soc/intel/cannonlake/romstage/fsp_params.c
M src/soc/intel/icelake/romstage/fsp_params.c
M src/soc/intel/jasperlake/romstage/fsp_params.c
M src/soc/intel/skylake/romstage/fsp_params.c
4 files changed, 7 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/52100/2
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52104 )
Change subject: soc/intel/alderlake: Drop unreferenced `InternalGfx`
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> did grep fail me? 😕
Uh, can you please point out the exact line you're referring to? Line 27 is ` PCH_PCIE_RP,` here.
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52096 )
Change subject: soc/intel/skylake: Always use `CHIPSET_LOCKDOWN_COREBOOT`
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Uhm, this looks more like a hack than a real solution to me. […]
I agree this isn't elegant. However, FSP lockdown is tied into soc/intel/common, so it's not like I can drop it in one patch. This change is a stopgap to prevent new boards from accidentally using CHIPSET_LOCKDOWN_FSP by omission.
Another approach would be to invert the enum values for chipset lockdown to make CHIPSET_LOCKDOWN_COREBOOT the default value, but that also requires checking each and every board. I'll see what I can do.
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Change subject: mb/intel/kblrvp: Always use `CHIPSET_LOCKDOWN_COREBOOT`
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> should be tested, just to be sure
I tested both settings on out-of-tree fujitsu/d3410-b1 and both booted fine.
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Change subject: mb/asrock/h110m: Choose `CHIPSET_LOCKDOWN_COREBOOT`
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> should be tested, just to be sure
I tested both settings on out-of-tree fujitsu/d3410-b1 and both booted fine.
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Change subject: soc/intel: Fix typo in comment
......................................................................
Patch Set 1: Code-Review+2
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Change subject: soc/intel/alderlake: Drop unreferenced `InternalGfx`
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> what about `src/soc/intel/alderlake/romstage/fsp_params. […]
meh. unresolved
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