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Change subject: soc/intel/common/block/irq: Add support for intel_write_pci0_PRT
......................................................................
Patch Set 10: Code-Review+2
(1 comment)
Patchset:
PS10:
Works on my voxel.
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Change subject: soc/intel/common: Add new IRQ module
......................................................................
Patch Set 26: Code-Review+2
(1 comment)
Patchset:
PS26:
Works on my voxel.
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Change subject: soc/intel/common: Add function to lpc_lib to return PIRQ routing
......................................................................
Patch Set 14: Code-Review+2
(2 comments)
Patchset:
PS14:
> PIRQ_* are redefined somewhere in the last few patchsets of 50857 as Angel mentioned.
Ah, my mistake. Initially, I tried cherry-picking that CL to the firmware branch and it ran into conflicts, which made me realize that I should be doing this on top-of-tree main, so I switched to main, but went on to cherry-pick the next CL in the stack instead of the base CL again as I had copied the next cherry-pick command before the previous one finished.
PS14:
Works on my voxel.
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Furquan Shaikh, Patrick Georgi, Martin Roth, Marshall Dawson, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51924
to look at the new patch set (#5).
Change subject: soc/amd/common: Handle power resume after power failure
......................................................................
soc/amd/common: Handle power resume after power failure
Introduce a power management library to handle the power resume after
power failure. Enable HAVE_POWER_STATE_AFTER_FAILURE config when this
library is enabled.
BUG=b:183739671
TEST=Build Guybrush and Majolica mainboard.
Change-Id: Iea4ea57d747425fe6714d40ba6e60f2447febf28
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
---
A src/soc/amd/common/block/include/amdblocks/pmlib.h
A src/soc/amd/common/block/pm/Kconfig
A src/soc/amd/common/block/pm/Makefile.inc
A src/soc/amd/common/block/pm/pmlib.c
4 files changed, 77 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/51924/5
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Hello Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52168
to look at the new patch set (#2).
Change subject: mb with INTEL_HASWELL: Remove double APM finalize call
......................................................................
mb with INTEL_HASWELL: Remove double APM finalize call
Calling APM_CNT_FINALIZE is already done in
southbridge/intel/lynxpoint/lpc.c in lpc_final().
Change-Id: Ic615c39762840de1bd4583a359dd7da74f0ae062
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/google/beltino/mainboard.c
M src/mainboard/google/slippy/mainboard.c
M src/mainboard/intel/baskingridge/mainboard.c
3 files changed, 0 insertions(+), 27 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/52168/2
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52168 )
Change subject: mb with INTEL_HASWELL: Remove double APM finalize call
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
I guess this was done to allow the chipset to be finalized later. However, this doesn't seem to be required anymore.
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