Attention is currently required from: V Sowmya, Rizwan Qureshi, Sridhar Siricilla, Meera Ravindranath, Balaji Manigandan, Deepti Deshatty.
Hello V Sowmya, build bot (Jenkins), Rizwan Qureshi, Subrata Banik, Meera Ravindranath, Balaji Manigandan, Deepti Deshatty,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52182
to look at the new patch set (#5).
Change subject: mb/intel/shadowmountain: Enable Bluetooth config in the devicetree
......................................................................
mb/intel/shadowmountain: Enable Bluetooth config in the devicetree
The patch enables Bluetooth config in the devicetree and removes
non-existent Bluetooth PCI interface.
TEST=Verified by checking Garfield Peak controller's PID:VID(8087:0033) in
the lsusb ouput.
Output of lsusb:
Bus 004 Device 003: ID 0bda:8153 Realtek Semiconductor Corp. USB 10/100/1000 LAN
Bus 004 Device 002: ID 0bda:0411 Realtek Semiconductor Corp. 4-Port USB 3.0 Hub
Bus 004 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
Bus 003 Device 003: ID 0781:55a9 SanDisk Corp. Dual Drive
Bus 003 Device 004: ID 413c:2113 Dell Computer Corp. Dell KB216 Wired Keyboard
Bus 003 Device 002: ID 0bda:5411 Realtek Semiconductor Corp. 4-Port USB 2.0 Hub
Bus 003 Device 005: ID 8087:0033 Intel Corp.
Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Change-Id: I7a54d344ef1b0418bee56e7308977a61604b954a
---
M src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/52182/5
--
To view, visit https://review.coreboot.org/c/coreboot/+/52182
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7a54d344ef1b0418bee56e7308977a61604b954a
Gerrit-Change-Number: 52182
Gerrit-PatchSet: 5
Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com>
Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com>
Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com>
Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com>
Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com>
Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: EricR Lai.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52185 )
Change subject: mb/google/brya: Add FPMCU power control
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/brya/variants/brya0/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/52185/comment/2e90b42b_d8fc2ffe
PS1, Line 196: register "has_power_resource" = "1"
This won't work right now, b/c this will generate a power resource which will let the kernel put the device in D3 for S0ix or S3 (which we don't want, b/c it's a wake source 😊). I have some WIP patches/ideas to improve power resources in coreboot; AFAICT it is possible to describe a power resource which will just power-sequence the device on into D0, but not put into D3 during suspend. tl;dr this won't work right now, coreboot still has to do the power sequencing manually (or you could add some ASL to do it)
--
To view, visit https://review.coreboot.org/c/coreboot/+/52185
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8a8fae80c3cc186e0a097ab2007abb656f382cbd
Gerrit-Change-Number: 52185
Gerrit-PatchSet: 1
Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Comment-Date: Thu, 08 Apr 2021 18:00:32 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Attention is currently required from: Tim Wawrzynczak, EricR Lai.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52185 )
Change subject: mb/google/brya: Add FPMCU power control
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> @Furquan, I can try to add new FPMCU driver, but here we have UART and SPI. […]
I posted a comment here: https://review.coreboot.org/c/coreboot/+/52181/comment/7357ab3f_150a962b/
I think we should do the same for brya. I know S3 isn't as critical on brya, but it would be good to keep the behavior consistent across S3 and S0ix.
--
To view, visit https://review.coreboot.org/c/coreboot/+/52185
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8a8fae80c3cc186e0a097ab2007abb656f382cbd
Gerrit-Change-Number: 52185
Gerrit-PatchSet: 1
Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Comment-Date: Thu, 08 Apr 2021 17:54:23 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-MessageType: comment
Attention is currently required from: Bhanu Prakash Maiya, Ivy Jian, EricR Lai.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52181 )
Change subject: mb/google/guybrush/var/guybrush: Add FPMCU configration
......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
> oh, I think _INI is prefect since it only called once? _PS0 will be called when back from S3.
Even if we call it in _INI, we are going to need to handle the coreboot S3 resume case gracefully. See my suggestion on https://review.coreboot.org/c/coreboot/+/52181/comment/7357ab3f_150a962b/
--
To view, visit https://review.coreboot.org/c/coreboot/+/52181
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7c56b0db193be6804d07c2f333445c2a1dbf9f59
Gerrit-Change-Number: 52181
Gerrit-PatchSet: 9
Gerrit-Owner: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com>
Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Mathew King <mathewk(a)chromium.org>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com>
Gerrit-Attention: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com>
Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Comment-Date: Thu, 08 Apr 2021 17:51:37 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-MessageType: comment
Attention is currently required from: V Sowmya, Rizwan Qureshi, Sridhar Siricilla, Meera Ravindranath, Balaji Manigandan, Deepti Deshatty.
Hello V Sowmya, build bot (Jenkins), Rizwan Qureshi, Meera Ravindranath, Subrata Banik, Balaji Manigandan, Deepti Deshatty,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52182
to look at the new patch set (#4).
Change subject: mb/intel/shadowmountain: Enable Bluetooth config in the devicetree
......................................................................
mb/intel/shadowmountain: Enable Bluetooth config in the devicetree
The patch enables Bluetooth config in the devicetree and removes
non-existent Bluetooth PCI interface.
TEST=Verified by checking Garfield Peak controller's PID:VID(8087:0033) in
the lsusb ouput.
Output of lsusb:
Change-Id: I1c257988af23d83830c8a980e52e9e741d51da41
----------------
Bus 004 Device 003: ID 0bda:8153 Realtek Semiconductor Corp. USB 10/100/1000 LAN
Bus 004 Device 002: ID 0bda:0411 Realtek Semiconductor Corp. 4-Port USB 3.0 Hub
Bus 004 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
Bus 003 Device 003: ID 0781:55a9 SanDisk Corp. Dual Drive
Bus 003 Device 004: ID 413c:2113 Dell Computer Corp. Dell KB216 Wired Keyboard
Bus 003 Device 002: ID 0bda:5411 Realtek Semiconductor Corp. 4-Port USB 2.0 Hub
Bus 003 Device 005: ID 8087:0033 Intel Corp.
Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Change-Id: I7a54d344ef1b0418bee56e7308977a61604b954a
---
M src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/52182/4
--
To view, visit https://review.coreboot.org/c/coreboot/+/52182
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7a54d344ef1b0418bee56e7308977a61604b954a
Gerrit-Change-Number: 52182
Gerrit-PatchSet: 4
Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com>
Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com>
Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com>
Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com>
Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com>
Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: Furquan Shaikh, Bhanu Prakash Maiya, Ivy Jian.
EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52181 )
Change subject: mb/google/guybrush/var/guybrush: Add FPMCU configration
......................................................................
Patch Set 9:
(1 comment)
File src/mainboard/google/guybrush/variants/guybrush/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/52181/comment/8b3a7004_ca166136
PS9, Line 113: register "has_power_resource" = "1"
> Thinking about this some more: […]
I am thinking we can connect these pins to EC next time :p We don't care about the driver and CPU...
--
To view, visit https://review.coreboot.org/c/coreboot/+/52181
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7c56b0db193be6804d07c2f333445c2a1dbf9f59
Gerrit-Change-Number: 52181
Gerrit-PatchSet: 9
Gerrit-Owner: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com>
Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Mathew King <mathewk(a)chromium.org>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Furquan Shaikh <furquan(a)google.com>
Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com>
Gerrit-Attention: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com>
Gerrit-Comment-Date: Thu, 08 Apr 2021 17:49:59 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com>
Gerrit-MessageType: comment
Attention is currently required from: Rizwan Qureshi, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52194 )
Change subject: common/block/pcie/rtd3:[WIP] use the correct confing name for clkreq pin count
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/block/pcie/rtd3/rtd3.c:
https://review.coreboot.org/c/coreboot/+/52194/comment/a815d095_7e490947
PS1, Line 203: CONFIG_MAX_PCIE_CLOCK_REQ
Couple of things:
1) I think this is referring to what alderlake/Kconfig calls `MAX_PCIE_CLOCK_SRC` (CLKSRC, not CLKREQ#)
2) Because this common code assumes the existence of MAX_PCIE_CLOCKS, the Kconfig `MAX_PCIE_CLOCK_SRC` needs to be renamed to `MAX_PCIE_CLOCKS` in order to use this module in alderlake code.
--
To view, visit https://review.coreboot.org/c/coreboot/+/52194
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I747c94331b68c4ec0b6b5a04149856a4bb384829
Gerrit-Change-Number: 52194
Gerrit-PatchSet: 1
Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Comment-Date: Thu, 08 Apr 2021 17:48:13 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment