coreboot-gerrit April 2021

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Change in coreboot[master]: [RFC] soc/intel/skylake: Introduce new method for setting device states
by Felix Singer (Code Review) 01 May '21

01 May '21

Attention is currently required from: Felix Singer, Raul Rangel, Nico Huber, Furquan Shaikh, Matt DeVillier, Angel Pons, Patrick Rudolph, Felix Held. Hello build bot (Jenkins), Raul Rangel, Nico Huber, Furquan Shaikh, Matt DeVillier, Tim Wawrzynczak, Angel Pons, Michael Niewöhner, Patrick Rudolph, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52493 to look at the new patch set (#10). Change subject: [RFC] soc/intel/skylake: Introduce new method for setting device states ...................................................................... [RFC] soc/intel/skylake: Introduce new method for setting device states We mostly use the same mechanism for setting the state of internal devices, but we copy it over again and again. Thus, introduce a new method trying to reduce redundant code. Basically, this uses an array of structs containing the DEVFN number, its corresponding FSP option and an indicator if the FSP option is inverted. The struct maps the device to its related FSP option and `set_dev_state_by_devicetree()` iterates over the array using the usual mechanism. Unresolved issues: - Where should fspdevmap{.c,.h} be implemented? Change-Id: I70fde306c65a8881f565c5f923be20f380ea64d3 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/soc/intel/skylake/Makefile.inc M src/soc/intel/skylake/chip.c A src/soc/intel/skylake/fspdevmap.c A src/soc/intel/skylake/fspdevmap.h M src/soc/intel/skylake/romstage/Makefile.inc M src/soc/intel/skylake/romstage/fsp_params.c 6 files changed, 68 insertions(+), 63 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/52493/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/52493 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70fde306c65a8881f565c5f923be20f380ea64d3 Gerrit-Change-Number: 52493 Gerrit-PatchSet: 10 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush: update the telemetry setting
by Felix Held (Code Review) 01 May '21

01 May '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52736 ) Change subject: mb/google/guybrush: update the telemetry setting ...................................................................... mb/google/guybrush: update the telemetry setting Update the telemetry setting for guybrush vddcrvddfull_scale_current : 92165 #mA ddcrvddoffset : 412 vddcrsocfull_scale_current : 30233 #mA vddcrsocoffset : 457 BUG=b:182754399 TEST=Build, boot to guybrush Change-Id: Ib92bb169693634665fc8e165837e7ae3e6137bcf Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52736 Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/guybrush/variants/guybrush/overridetree.cb 1 file changed, 5 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, but someone else must approve Marshall Dawson: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb index 3519170..53e821e 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb @@ -42,6 +42,11 @@ register "sustained_power_limit_mW" = "15000" register "thermctl_limit_degreeC" = "100" + register "telemetry_vddcrvddfull_scale_current_mA" = "92165" #mA + register "telemetry_vddcrvddoffset" = "412" + register "telemetry_vddcrsocfull_scale_current_mA" = "30233" #mA + register "telemetry_vddcrsocoffset" = "457" + # I2C Config #+-------------------+---------------------------+ #| Field | Value | -- To view, visit https://review.coreboot.org/c/coreboot/+/52736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib92bb169693634665fc8e165837e7ae3e6137bcf Gerrit-Change-Number: 52736 Gerrit-PatchSet: 5 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: [RFC] soc/intel/skylake: Introduce new method for setting device states
by Michael Niewöhner (Code Review) 01 May '21

01 May '21

Attention is currently required from: Felix Singer, Raul Rangel, Nico Huber, Furquan Shaikh, Matt DeVillier, Angel Pons, Patrick Rudolph, Felix Held. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52493 ) Change subject: [RFC] soc/intel/skylake: Introduce new method for setting device states ...................................................................... Patch Set 9: (1 comment) File src/soc/intel/skylake/fspdevmap.h: https://review.coreboot.org/c/coreboot/+/52493/comment/a038caf1_f7960310 PS9, Line 13: const > For the actual function definition, yes. But please not for the forward […] You mean, the first `const` in the forward declaration and both in the function definition or none at all in the forward declaration? -- To view, visit https://review.coreboot.org/c/coreboot/+/52493 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70fde306c65a8881f565c5f923be20f380ea64d3 Gerrit-Change-Number: 52493 Gerrit-PatchSet: 9 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 30 Apr 2021 16:20:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: amd/cezanne: Add telemetry setting to UPD
by Felix Held (Code Review) 01 May '21

01 May '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52733 ) Change subject: amd/cezanne: Add telemetry setting to UPD ...................................................................... amd/cezanne: Add telemetry setting to UPD Add telemetry setting to UPD, the value comes from the SDLE testing. BUG=b:182754399 TEST=Build & Boot guybrush Cq-Depend: chrome-internal:3787638 Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Change-Id: I9dd3643e9c582a41192130901935eef321b2c67e Reviewed-on: https://review.coreboot.org/c/coreboot/+/52733 Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/amd/cezanne/chip.h M src/soc/amd/cezanne/fsp_m_params.c M src/vendorcode/amd/fsp/cezanne/FspmUpd.h 3 files changed, 23 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Marshall Dawson: Looks good to me, approved diff --git a/src/soc/amd/cezanne/chip.h b/src/soc/amd/cezanne/chip.h index 6b6a28f..244f2ba 100644 --- a/src/soc/amd/cezanne/chip.h +++ b/src/soc/amd/cezanne/chip.h @@ -68,6 +68,13 @@ uint8_t cppc_epp_max_range; uint8_t cppc_epp_min_range; uint8_t cppc_preferred_cores; + + /* telemetry settings */ + uint32_t telemetry_vddcrvddfull_scale_current_mA; + uint32_t telemetry_vddcrvddoffset; + uint32_t telemetry_vddcrsocfull_scale_current_mA; + uint32_t telemetry_vddcrsocoffset; + }; #endif /* CEZANNE_CHIP_H */ diff --git a/src/soc/amd/cezanne/fsp_m_params.c b/src/soc/amd/cezanne/fsp_m_params.c index 2528086..8da38ff 100644 --- a/src/soc/amd/cezanne/fsp_m_params.c +++ b/src/soc/amd/cezanne/fsp_m_params.c @@ -118,5 +118,15 @@ /* S0i3 enable */ mcfg->s0i3_enable = config->s0ix_enable; + /* voltage regulator telemetry settings */ + mcfg->telemetry_vddcrvddfull_scale_current = + config->telemetry_vddcrvddfull_scale_current_mA; + mcfg->telemetry_vddcrvddoffset = + config->telemetry_vddcrvddoffset; + mcfg->telemetry_vddcrsocfull_scale_current = + config->telemetry_vddcrsocfull_scale_current_mA; + mcfg->telemetry_vddcrsocOffset = + config->telemetry_vddcrsocoffset; + fsp_fill_pcie_ddi_descriptors(mcfg); } diff --git a/src/vendorcode/amd/fsp/cezanne/FspmUpd.h b/src/vendorcode/amd/fsp/cezanne/FspmUpd.h index 6e9a1f0..f01af85 100644 --- a/src/vendorcode/amd/fsp/cezanne/FspmUpd.h +++ b/src/vendorcode/amd/fsp/cezanne/FspmUpd.h @@ -102,8 +102,12 @@ /** Offset 0x04A4**/ uint8_t fch_ioapic_id; /** Offset 0x04A5**/ uint8_t sata_enable; /** Offset 0x04A6**/ uint8_t fch_reserved[32]; - /** Offset 0x04A7**/ uint8_t s0i3_enable; - /** Offset 0x04C6**/ uint8_t UnusedUpdSpace0[57]; + /** Offset 0x04C6**/ uint8_t s0i3_enable; + /** Offset 0x04C7**/ uint32_t telemetry_vddcrvddfull_scale_current; + /** Offset 0x04CB**/ uint32_t telemetry_vddcrvddoffset; + /** Offset 0x04CF**/ uint32_t telemetry_vddcrsocfull_scale_current; + /** Offset 0x04D3**/ uint32_t telemetry_vddcrsocOffset; + /** Offset 0x04D7**/ uint8_t UnusedUpdSpace0[41]; /** Offset 0x0500**/ uint16_t UpdTerminator; } FSP_M_CONFIG; -- To view, visit https://review.coreboot.org/c/coreboot/+/52733 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dd3643e9c582a41192130901935eef321b2c67e Gerrit-Change-Number: 52733 Gerrit-PatchSet: 5 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/mancomb: Add STAPM values to overridetree
by Felix Held (Code Review) 01 May '21

01 May '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52709 ) Change subject: mb/google/mancomb: Add STAPM values to overridetree ...................................................................... mb/google/mancomb: Add STAPM values to overridetree Follow the FP6 IRM(#56328) to set the stapm parameter and allow other mancomb variants boards can customize those parameters. BUG=b:1181157669 TEST=build. Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Change-Id: Ib3ed76e5212a5a8b5fb4fcc3d6884ceff82377b7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52709 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/mainboard/google/mancomb/variants/baseboard/devicetree.cb M src/mainboard/google/mancomb/variants/mancomb/overridetree.cb 2 files changed, 10 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Marshall Dawson: Looks good to me, approved diff --git a/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb b/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb index 9bf52c7..ab5ade7 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb @@ -1,6 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip soc/amd/cezanne + register "system_configuration" = "3" + # eSPI Configuration register "common_config.espi_config" = "{ .std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X60_0X64_EN, diff --git a/src/mainboard/google/mancomb/variants/mancomb/overridetree.cb b/src/mainboard/google/mancomb/variants/mancomb/overridetree.cb index 891b4eb..ef52ac0 100644 --- a/src/mainboard/google/mancomb/variants/mancomb/overridetree.cb +++ b/src/mainboard/google/mancomb/variants/mancomb/overridetree.cb @@ -1,4 +1,12 @@ chip soc/amd/cezanne + + register "slow_ppt_limit_mW" = "37500" + register "fast_ppt_limit_mW" = "48000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "275" + register "sustained_power_limit_mW" = "25000" + register "thermctl_limit_degreeC" = "100" + device domain 0 on end # domain -- To view, visit https://review.coreboot.org/c/coreboot/+/52709 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib3ed76e5212a5a8b5fb4fcc3d6884ceff82377b7 Gerrit-Change-Number: 52709 Gerrit-PatchSet: 4 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: Added Star Labs labtop series
by Star Labs (Code Review) 01 May '21

01 May '21

Attention is currently required from: Star Labs. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52798 to look at the new patch set (#3). Change subject: Added Star Labs labtop series ...................................................................... Added Star Labs labtop series Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 --- A src/mainboard/starlabs/Kconfig A src/mainboard/starlabs/Kconfig.name A src/mainboard/starlabs/labtop/Kconfig A src/mainboard/starlabs/labtop/Kconfig.name A src/mainboard/starlabs/labtop/Makefile.inc A src/mainboard/starlabs/labtop/acpi/ec.asl A src/mainboard/starlabs/labtop/acpi/mainboard.asl A src/mainboard/starlabs/labtop/acpi/sleep.asl A src/mainboard/starlabs/labtop/acpi/superio.asl A src/mainboard/starlabs/labtop/board_info.txt A src/mainboard/starlabs/labtop/bootblock.c A src/mainboard/starlabs/labtop/cmos.default A src/mainboard/starlabs/labtop/cmos.layout A src/mainboard/starlabs/labtop/dsdt.asl A src/mainboard/starlabs/labtop/hda_verb.c A src/mainboard/starlabs/labtop/mainboard.c A src/mainboard/starlabs/labtop/ramstage.c A src/mainboard/starlabs/labtop/spd/Makefile.inc A src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex A src/mainboard/starlabs/labtop/spd/gskill-F4-3200C22S.hex A src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex A src/mainboard/starlabs/labtop/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex A src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex A src/mainboard/starlabs/labtop/spd/spd.h A src/mainboard/starlabs/labtop/spd/spd_util.c A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/memory.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/romstage.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/variants.h A src/mainboard/starlabs/labtop/variants/cml/Makefile.inc A src/mainboard/starlabs/labtop/variants/cml/board.fmd A src/mainboard/starlabs/labtop/variants/cml/data.vbt A src/mainboard/starlabs/labtop/variants/cml/devicetree.cb A src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/cml/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/cml/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/cml/romstage.c A src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc A src/mainboard/starlabs/labtop/variants/kbl/board.fmd A src/mainboard/starlabs/labtop/variants/kbl/data.vbt A src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb A src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/kbl/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/kbl/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/kbl/romstage.c A src/mainboard/starlabs/labtop/variants/tgl/Makefile.inc A src/mainboard/starlabs/labtop/variants/tgl/board.fmd A src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb A src/mainboard/starlabs/labtop/variants/tgl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/tgl/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/tgl/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/tgl/romstage.c 51 files changed, 2,551 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/52798/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 Gerrit-Change-Number: 52798 Gerrit-PatchSet: 3 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Added Star Labs ITE 8987E support
by Star Labs (Code Review) 01 May '21

01 May '21

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Change in coreboot[master]: Added Star Labs ITE 8987E support
by Star Labs (Code Review) 01 May '21

01 May '21

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Change in coreboot[master]: Added Star Labs labtop series
by build bot (Jenkins) (Code Review) 01 May '21

01 May '21

Attention is currently required from: Star Labs. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52798 ) Change subject: Added Star Labs labtop series ...................................................................... Patch Set 2: (95 comments) File src/mainboard/starlabs/labtop/variants/cml/include/variant/gpio.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/cd482e32_3451a63f PS2, Line 18: _PAD_CFG_STRUCT(GPP_E22, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/9dfc7a57_7ff53fa8 PS2, Line 19: _PAD_CFG_STRUCT(GPP_E23, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/742e2fb1_fe367bd1 PS2, Line 22: _PAD_CFG_STRUCT(GPP_H6, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/73449ae9_7ef24b88 PS2, Line 23: _PAD_CFG_STRUCT(GPP_H7, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/278488c9_76e8ceff PS2, Line 35: _PAD_CFG_STRUCT(GPP_A0, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/58acc7be_845e3a78 PS2, Line 36: _PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/df01ad4e_dd85de96 PS2, Line 37: _PAD_CFG_STRUCT(GPP_A2, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/a8b0cc36_940cb6eb PS2, Line 38: _PAD_CFG_STRUCT(GPP_A3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/a9d512ec_ac6afd8d PS2, Line 39: _PAD_CFG_STRUCT(GPP_A4, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/a9ed0cf9_b650fc1d PS2, Line 40: _PAD_CFG_STRUCT(GPP_A5, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/68d9ccc8_a75d4d5b PS2, Line 41: _PAD_CFG_STRUCT(GPP_A6, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/22f5c64e_0b3076d7 PS2, Line 42: _PAD_CFG_STRUCT(GPP_A7, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(LEVEL) | PAD_BUF(TX_DISABLE) | PAD_IRQ_ROUTE(IOAPIC), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/2455f42d_562349f9 PS2, Line 43: _PAD_CFG_STRUCT(GPP_A8, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/140ff4c1_aa270bf2 PS2, Line 44: _PAD_CFG_STRUCT(GPP_A9, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(DN_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/91a384df_85144a21 PS2, Line 45: _PAD_CFG_STRUCT(GPP_A10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(DN_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/dd4ef0d0_853e56d1 PS2, Line 46: _PAD_CFG_STRUCT(GPP_A13, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/c3b2f8a4_59ef07c3 PS2, Line 47: _PAD_CFG_STRUCT(GPP_A14, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/2b7bb9ff_478cdfd0 PS2, Line 48: _PAD_CFG_STRUCT(GPP_A15, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/2452886e_835bd546 PS2, Line 49: _PAD_CFG_STRUCT(GPP_A16, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/dd7fded3_07a8a5ef PS2, Line 50: _PAD_CFG_STRUCT(GPP_A18, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/55542f6a_6ecb6b71 PS2, Line 51: _PAD_CFG_STRUCT(GPP_A19, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/2c3beba4_ab4ec5e7 PS2, Line 52: _PAD_CFG_STRUCT(GPP_A20, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/6a96b4ab_2a126a00 PS2, Line 53: _PAD_CFG_STRUCT(GPP_A21, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/42c3afc4_24d89976 PS2, Line 54: _PAD_CFG_STRUCT(GPP_A22, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/9bb59d75_dd4f9945 PS2, Line 55: _PAD_CFG_STRUCT(GPP_A23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/6f053bc5_c60edf2c PS2, Line 58: _PAD_CFG_STRUCT(GPP_B2, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/36683529_8d875e77 PS2, Line 59: _PAD_CFG_STRUCT(GPP_B3, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/63dc028f_47d2cc9d PS2, Line 60: _PAD_CFG_STRUCT(GPP_B4, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/ad67c988_bdd95a97 PS2, Line 61: _PAD_CFG_STRUCT(GPP_B11, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/10c3b88b_47aaaddc PS2, Line 62: _PAD_CFG_STRUCT(GPP_B12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/99de39fe_4052342f PS2, Line 63: _PAD_CFG_STRUCT(GPP_B13, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/37c92bd6_c7a95adb PS2, Line 64: _PAD_CFG_STRUCT(GPP_B14, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/5728a31e_f6ef7f30 PS2, Line 65: _PAD_CFG_STRUCT(GPP_B15, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/ba35bc42_3931957f PS2, Line 66: _PAD_CFG_STRUCT(GPP_B16, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/fd8c66dd_82f7a208 PS2, Line 67: _PAD_CFG_STRUCT(GPP_B17, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/21462943_9bdc56aa PS2, Line 68: _PAD_CFG_STRUCT(GPP_B23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/a314e450_59a14c3b PS2, Line 71: _PAD_CFG_STRUCT(GPP_G5, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/eda6b9e7_a7bf8694 PS2, Line 72: _PAD_CFG_STRUCT(GPP_G7, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(DN_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/c675bb8a_e5ee7106 PS2, Line 75: _PAD_CFG_STRUCT(GPP_D9, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/a127f713_460b17d9 PS2, Line 76: _PAD_CFG_STRUCT(GPP_D10, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/6f165cf0_2438df3c PS2, Line 77: _PAD_CFG_STRUCT(GPP_D11, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(SCI) | PAD_BUF(TX_DISABLE) | PAD_RX_POL(INVERT), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/63b0b58d_726571c2 PS2, Line 78: _PAD_CFG_STRUCT(GPP_D14, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/821636e0_e6c06293 PS2, Line 79: _PAD_CFG_STRUCT(GPP_D15, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/6e2b6f1e_5bb190d6 PS2, Line 80: _PAD_CFG_STRUCT(GPP_D16, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/558cc63a_614d8c94 PS2, Line 81: _PAD_CFG_STRUCT(GPP_D17, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/66ae9bc4_ce3aac68 PS2, Line 82: _PAD_CFG_STRUCT(GPP_D18, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/56d890ad_514e4689 PS2, Line 83: _PAD_CFG_STRUCT(GPP_D19, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/223d29b3_fa25bb47 PS2, Line 84: _PAD_CFG_STRUCT(GPP_D20, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/c70a51af_12d457bd PS2, Line 87: _PAD_CFG_STRUCT(GPP_F0, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(LEVEL) | PAD_BUF(TX_RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/a7a67167_25d7a3e4 PS2, Line 88: _PAD_CFG_STRUCT(GPP_F1, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/391b657b_bf78bebb PS2, Line 89: _PAD_CFG_STRUCT(GPP_F2, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/e917bea9_c5a16517 PS2, Line 90: _PAD_CFG_STRUCT(GPP_F3, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/507d799a_34da3e51 PS2, Line 91: _PAD_CFG_STRUCT(GPP_F4, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/52bc154e_1deaff98 PS2, Line 92: _PAD_CFG_STRUCT(GPP_F5, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/5a0f2e14_7cc59287 PS2, Line 93: _PAD_CFG_STRUCT(GPP_F6, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/54a813d2_318e36c0 PS2, Line 94: _PAD_CFG_STRUCT(GPP_F7, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/927a71b0_26abfad2 PS2, Line 95: _PAD_CFG_STRUCT(GPP_F10, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/fa0c170f_b89ebba6 PS2, Line 98: _PAD_CFG_STRUCT(GPP_H0, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/7ddde5f5_aa829ad5 PS2, Line 99: _PAD_CFG_STRUCT(GPP_H1, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/cd3589d6_5913793d PS2, Line 100: _PAD_CFG_STRUCT(GPP_H2, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/5f9310df_ebe5d4a9 PS2, Line 101: _PAD_CFG_STRUCT(GPP_H3, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/efec1405_77201d7c PS2, Line 102: _PAD_CFG_STRUCT(GPP_H4, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/92c9aa7e_2251c783 PS2, Line 103: _PAD_CFG_STRUCT(GPP_H5, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/c2340c69_427ce822 PS2, Line 104: _PAD_CFG_STRUCT(GPP_H10, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/3dd9b47a_23830c88 PS2, Line 105: _PAD_CFG_STRUCT(GPP_H11, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/0af9de1a_537fbc71 PS2, Line 106: _PAD_CFG_STRUCT(GPP_H12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/d2c4210f_55a2a806 PS2, Line 107: _PAD_CFG_STRUCT(GPP_H13, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/6a6aee91_51885355 PS2, Line 108: _PAD_CFG_STRUCT(GPP_H14, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/a7ccdf07_46f82d43 PS2, Line 109: _PAD_CFG_STRUCT(GPP_H15, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/af867dd9_3755d4a9 PS2, Line 110: _PAD_CFG_STRUCT(GPP_H16, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/6fb2ddcb_9326949f PS2, Line 111: _PAD_CFG_STRUCT(GPP_H17, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/7b6afe23_acc1992b PS2, Line 112: _PAD_CFG_STRUCT(GPP_H19, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/05a5154e_0e4a0204 PS2, Line 113: _PAD_CFG_STRUCT(GPP_H20, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/11e6bbf2_83578654 PS2, Line 114: _PAD_CFG_STRUCT(GPP_H22, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/2306b9c4_70b767d7 PS2, Line 117: _PAD_CFG_STRUCT(GPP_C2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/e1959611_ad451225 PS2, Line 118: _PAD_CFG_STRUCT(GPP_C5, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(SCI) | PAD_BUF(TX_DISABLE) | PAD_RX_POL(INVERT), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/64af5601_886dc4a9 PS2, Line 119: _PAD_CFG_STRUCT(GPP_C8, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/0d588faf_2a671662 PS2, Line 120: _PAD_CFG_STRUCT(GPP_C9, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SCI) | PAD_BUF(TX_DISABLE) | PAD_RX_POL(INVERT), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/bd14f1c2_b7a25166 PS2, Line 121: _PAD_CFG_STRUCT(GPP_C10, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/f6588de7_6601ded5 PS2, Line 122: _PAD_CFG_STRUCT(GPP_C11, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/aa93bc80_711a0eff PS2, Line 123: _PAD_CFG_STRUCT(GPP_C12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/d50598b7_86133a2d PS2, Line 124: _PAD_CFG_STRUCT(GPP_C15, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/f98828df_77ca2805 PS2, Line 125: _PAD_CFG_STRUCT(GPP_C16, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/7ab10b28_aaf98012 PS2, Line 126: _PAD_CFG_STRUCT(GPP_C17, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/07d03055_43a48528 PS2, Line 127: _PAD_CFG_STRUCT(GPP_C18, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/bb135d23_7a4df3d6 PS2, Line 128: _PAD_CFG_STRUCT(GPP_C19, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/a92ad65c_68330ac4 PS2, Line 131: _PAD_CFG_STRUCT(GPP_E2, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/fcb876b9_c2d0b114 PS2, Line 132: _PAD_CFG_STRUCT(GPP_E3, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SMI) | PAD_BUF(TX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/0f708aa0_3c7ecd0c PS2, Line 133: _PAD_CFG_STRUCT(GPP_E4, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(SCI) | PAD_BUF(TX_DISABLE) | PAD_RX_POL(INVERT), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/e3a47601_c811d430 PS2, Line 134: _PAD_CFG_STRUCT(GPP_E7, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_BUF(TX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/7927a816_28e1f666 PS2, Line 135: _PAD_CFG_STRUCT(GPP_E11, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/8138a3fc_d96339f0 PS2, Line 136: _PAD_CFG_STRUCT(GPP_E12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/9954d2ef_0593b5c2 PS2, Line 137: _PAD_CFG_STRUCT(GPP_E15, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | PAD_CFG0_TX_STATE, PAD_PULL(NONE)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/a92024a5_7cbdad5d PS2, Line 138: _PAD_CFG_STRUCT(GPP_E16, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(SCI) | PAD_BUF(TX_DISABLE) | PAD_RX_POL(INVERT), PAD_PULL(UP_20K)), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118118): https://review.coreboot.org/c/coreboot/+/52798/comment/743948ea_5c537004 PS2, Line 139: _PAD_CFG_STRUCT(GPP_E17, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NONE)), line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/52798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 Gerrit-Change-Number: 52798 Gerrit-PatchSet: 2 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-Comment-Date: Fri, 30 Apr 2021 15:46:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Added Star Labs labtop series
by Star Labs (Code Review) 01 May '21

01 May '21

Attention is currently required from: Star Labs. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52798 to look at the new patch set (#2). Change subject: Added Star Labs labtop series ...................................................................... Added Star Labs labtop series Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 --- A src/mainboard/starlabs/Kconfig A src/mainboard/starlabs/Kconfig.name A src/mainboard/starlabs/labtop/Kconfig A src/mainboard/starlabs/labtop/Kconfig.name A src/mainboard/starlabs/labtop/Makefile.inc A src/mainboard/starlabs/labtop/acpi/ec.asl A src/mainboard/starlabs/labtop/acpi/mainboard.asl A src/mainboard/starlabs/labtop/acpi/sleep.asl A src/mainboard/starlabs/labtop/acpi/superio.asl A src/mainboard/starlabs/labtop/board_info.txt A src/mainboard/starlabs/labtop/bootblock.c A src/mainboard/starlabs/labtop/cmos.default A src/mainboard/starlabs/labtop/cmos.layout A src/mainboard/starlabs/labtop/dsdt.asl A src/mainboard/starlabs/labtop/hda_verb.c A src/mainboard/starlabs/labtop/mainboard.c A src/mainboard/starlabs/labtop/ramstage.c A src/mainboard/starlabs/labtop/spd/Makefile.inc A src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex A src/mainboard/starlabs/labtop/spd/gskill-F4-3200C22S.hex A src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex A src/mainboard/starlabs/labtop/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex A src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex A src/mainboard/starlabs/labtop/spd/spd.h A src/mainboard/starlabs/labtop/spd/spd_util.c A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/memory.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/romstage.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/variants.h A src/mainboard/starlabs/labtop/variants/cml/Makefile.inc A src/mainboard/starlabs/labtop/variants/cml/board.fmd A src/mainboard/starlabs/labtop/variants/cml/data.vbt A src/mainboard/starlabs/labtop/variants/cml/devicetree.cb A src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/cml/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/cml/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/cml/romstage.c A src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc A src/mainboard/starlabs/labtop/variants/kbl/board.fmd A src/mainboard/starlabs/labtop/variants/kbl/data.vbt A src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb A src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/kbl/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/kbl/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/kbl/romstage.c A src/mainboard/starlabs/labtop/variants/tgl/Makefile.inc A src/mainboard/starlabs/labtop/variants/tgl/board.fmd A src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb A src/mainboard/starlabs/labtop/variants/tgl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/tgl/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/tgl/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/tgl/romstage.c 51 files changed, 2,551 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/52798/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 Gerrit-Change-Number: 52798 Gerrit-PatchSet: 2 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-MessageType: newpatchset

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