Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52802 )
Change subject: mb/google/mancomb: Fix S0i3/S3 GPIO configuration
......................................................................
mb/google/mancomb: Fix S0i3/S3 GPIO configuration
Using PAD_WAKE is actually wrong. The wake bits are only supposed to be
set when using the GPIO controller to wake the system. Coreboot's
current architecture relies on using GPEs to wake the system.
BUG=b:186011392
TEST=none
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: Ib956fc299fe21cd7ea0b465cbdc5c8da830a668d
---
M src/mainboard/google/mancomb/variants/baseboard/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/52802/1
diff --git a/src/mainboard/google/mancomb/variants/baseboard/gpio.c b/src/mainboard/google/mancomb/variants/baseboard/gpio.c
index a9346a3..f829117 100644
--- a/src/mainboard/google/mancomb/variants/baseboard/gpio.c
+++ b/src/mainboard/google/mancomb/variants/baseboard/gpio.c
@@ -47,7 +47,7 @@
/* AGPIO21 */
PAD_NC(GPIO_21),
/* EC_SOC_WAKE_ODL */
- PAD_WAKE(GPIO_22, PULL_NONE, EDGE_LOW, S0i3),
+ PAD_SCI(GPIO_22, PULL_NONE, EDGE_LOW),
/* AC_PRES */
PAD_NF(GPIO_23, AC_PRES, PULL_UP),
/* HUB_RST_L */
--
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Gerrit-Change-Id: Ib956fc299fe21cd7ea0b465cbdc5c8da830a668d
Gerrit-Change-Number: 52802
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Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51849 )
Change subject: soc/intel/alderlake: Fill FSPM UPDs for VT-d configuration
......................................................................
Patch Set 12:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/51849/comment/08c74fd0_34f9389a
PS11, Line 7: Enable VT-d
> The code gives the opportunity for VT-d configuration. Rather write something like: […]
Done
https://review.coreboot.org/c/coreboot/+/51849/comment/96916a14_b7597030
PS11, Line 9: enabling
> configuring
Done
File src/soc/intel/alderlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/51849/comment/c85fd8c7_00d812ec
PS11, Line 230:
> What about TBT0BAR, etc. […]
Currently we only need VtdBaseAddress 0,1 and 2 and not using beyond that. Confirmed from the FSP code.
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52493 )
Change subject: [RFC] soc/intel/skylake: Introduce new method for setting device states
......................................................................
Patch Set 10:
(4 comments)
File src/soc/intel/skylake/fspdevmap.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118122):
https://review.coreboot.org/c/coreboot/+/52493/comment/a7c43df4_75a086c1
PS10, Line 8: UINT8 *const option;
need consistent spacing around '*' (ctx:WxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118122):
https://review.coreboot.org/c/coreboot/+/52493/comment/54abbedb_81209066
PS10, Line 13: void set_dev_state_by_devicetree(const struct device_fspoption_map *devmap, const uint8_t arrsize);
line over 96 characters
File src/soc/intel/skylake/fspdevmap.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118122):
https://review.coreboot.org/c/coreboot/+/52493/comment/8dd62335_594a5938
PS10, Line 6: void set_dev_state_by_devicetree(const struct device_fspoption_map *devmap, const uint8_t arrsize)
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118122):
https://review.coreboot.org/c/coreboot/+/52493/comment/6cfd2605_06107560
PS10, Line 13: if (dev) {
braces {} are not necessary for single statement blocks
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52627 )
Change subject: soc/intel/skylake: Clean up root port structs
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> There's no benefit here. […]
Oooops. You are right. Thanks for the hint. I remember a short discussion on that, when we introduced that code. :)
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