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Change subject: soc/intel/alderlake: Use common bootblock basecode
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51153
to look at the new patch set (#3).
Change subject: mb/google/dedede/var/drawcia: Re-tune override GPIO table
......................................................................
mb/google/dedede/var/drawcia: Re-tune override GPIO table
There is going to be an upcoming board version for Drawlat/man and
Drawcia. Hence apply the override GPIO table without pad termination for
board versions 6 or 8 alone.
BUG=None
BRANCH=dedede
TEST=Build and boot to OS in Drawcia.
Change-Id: I320de9a0c37ac033f3efda74eeb8f36e34667fd4
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
---
M src/mainboard/google/dedede/variants/drawcia/gpio.c
1 file changed, 10 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/51153/3
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Change subject: soc/intel/jasperlake: Use common bootblock basecode
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Change subject: soc/intel/icelake: Use common bootblock basecode
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Change subject: soc/intel/icelake: Use common bootblock basecode
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
I need to rethink the patch series.
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Change subject: soc/intel/common/basecode: Add bootblock common code
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS2:
> Thanks for doing this. I think it just moves a little bit too […]
Hrm, let me rethink the patch series...
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