coreboot-gerrit March 2021

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Change in coreboot[master]: soc/intel: Retype `CnviBtAudioOffload` devicetree option
by Furquan Shaikh (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Tim Wawrzynczak, Angel Pons, Subrata Banik, Patrick Rudolph. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51154 ) Change subject: soc/intel: Retype `CnviBtAudioOffload` devicetree option ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/51154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c9b4c6a2f210ffca946ca196299fa672a06ccc7 Gerrit-Change-Number: 51154 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 01 Mar 2021 20:27:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry
by Angel Pons (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Furquan Shaikh, Wonkyu Kim, Bernardo Perez Priego, Srinidhi N Kaushik, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50897 ) Change subject: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/tigerlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/50897/comment/b7544593_7cff3154 PS6, Line 357: CnviBtCore > > I just quickly looked at the FSP CNVi code. I am more toward your suggestion. […] Made CB:51154 to drop the confusing values for the `CnviBtAudioOffload` devicetree option. In any case, a less verbose approach would be: dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI); params->CnviMode = is_dev_enabled(dev); if (params->CnviMode) { params->CnviBtCore = config->CnviBtCore; params->CnviBtAudioOffload = config->CnviBtAudioOffload; } else { params->CnviBtCore = 0; params->CnviBtAudioOffload = 0; } -- To view, visit https://review.coreboot.org/c/coreboot/+/50897 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71c512fe884060e23ee26e7334c575c4c517b78d Gerrit-Change-Number: 50897 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AndreX Andraos <andrex.andraos(a)intel.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 01 Mar 2021 20:26:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Retype `CnviBtAudioOffload` devicetree option
by Angel Pons (Code Review) 01 Mar '21

01 Mar '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51154 ) Change subject: soc/intel: Retype `CnviBtAudioOffload` devicetree option ...................................................................... soc/intel: Retype `CnviBtAudioOffload` devicetree option The `FORCE_ENABLE` and `FORCE_DISABLE` names do not match what FSP UPDs say, and can be confused with the `PchHdaTestPowerClockGating` UPD. Replace the enum with a bool, and drop the confusing names. Note that the enum for Ice Lake was incorrect, but no mainboards used the option. Change-Id: I2c9b4c6a2f210ffca946ca196299fa672a06ccc7 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/soc/intel/alderlake/chip.h M src/soc/intel/elkhartlake/chip.h M src/soc/intel/icelake/chip.h M src/soc/intel/jasperlake/chip.h M src/soc/intel/tigerlake/chip.h 6 files changed, 6 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/51154/1 diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 6a826c0..825005e 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -289,7 +289,7 @@ register "tcc_offset" = "10" # TCC of 90 - register "CnviBtAudioOffload" = "FORCE_ENABLE" + register "CnviBtAudioOffload" = "true" # Intel Common SoC Config #+-------------------+---------------------------+ diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index 13e77cf..fa9fce2 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -207,10 +207,7 @@ uint8_t pch_isclk; /* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */ - enum { - FORCE_DISABLE, - FORCE_ENABLE, - } CnviBtAudioOffload; + bool CnviBtAudioOffload; /* * IOM Port Config diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h index 1d97b36..c3a7ac1 100644 --- a/src/soc/intel/elkhartlake/chip.h +++ b/src/soc/intel/elkhartlake/chip.h @@ -196,10 +196,7 @@ unsigned int sdcard_cd_gpio; /* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */ - enum { - FORCE_DISABLE, - FORCE_ENABLE, - } CnviBtAudioOffload; + bool CnviBtAudioOffload; /* Tcss */ uint8_t TcssXhciEn; diff --git a/src/soc/intel/icelake/chip.h b/src/soc/intel/icelake/chip.h index 64bc70b..b878fd6 100644 --- a/src/soc/intel/icelake/chip.h +++ b/src/soc/intel/icelake/chip.h @@ -184,11 +184,7 @@ uint8_t pch_isclk; /* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */ - enum { - PLATFORM_POR, - FORCE_ENABLE, - FORCE_DISABLE, - } CnviBtAudioOffload; + bool CnviBtAudioOffload; /* * Override GPIO PM configuration: diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h index 6e52efd..c25ccbf 100644 --- a/src/soc/intel/jasperlake/chip.h +++ b/src/soc/intel/jasperlake/chip.h @@ -199,10 +199,7 @@ uint8_t pch_isclk; /* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */ - enum { - FORCE_DISABLE, - FORCE_ENABLE, - } CnviBtAudioOffload; + bool CnviBtAudioOffload; /* Tcss */ uint8_t TcssXhciEn; diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index cccf804..76a2480 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -317,10 +317,7 @@ } debug_interface_flag; /* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */ - enum { - FORCE_DISABLE, - FORCE_ENABLE, - } CnviBtAudioOffload; + bool CnviBtAudioOffload; /* TCSS USB */ uint8_t TcssXhciEn; -- To view, visit https://review.coreboot.org/c/coreboot/+/51154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c9b4c6a2f210ffca946ca196299fa672a06ccc7 Gerrit-Change-Number: 51154 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry
by Shaunak Saha (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Wonkyu Kim, Angel Pons, Bernardo Perez Priego, Srinidhi N Kaushik, Patrick Rudolph. Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50897 ) Change subject: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/tigerlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/50897/comment/d1ab117c_9a2de13c PS6, Line 357: params->CnviBtCore = config->CnviBtCore; > Good point. This flag is added for tiger lake, let me check with FSP team. […] Else part seems to be the default configuration when the device is not enabled. Is it better if we keep the else outside as default just before checking the device enabled and then when device is enabled we just overwrite those. -- To view, visit https://review.coreboot.org/c/coreboot/+/50897 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71c512fe884060e23ee26e7334c575c4c517b78d Gerrit-Change-Number: 50897 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AndreX Andraos <andrex.andraos(a)intel.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 01 Mar 2021 20:18:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry
by Furquan Shaikh (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Wonkyu Kim, Angel Pons, Bernardo Perez Priego, Srinidhi N Kaushik, Patrick Rudolph. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50897 ) Change subject: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/tigerlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/50897/comment/85269fcf_b6392924 PS6, Line 357: CnviBtCore > I just quickly looked at the FSP CNVi code. I am more toward your suggestion. How about the following? Looks okay to me. > Still, letting board to enable/disable BT if needed. Sounds okay. > Also, It makes sense to include the BT audio Offload to part of it. Agreed. -- To view, visit https://review.coreboot.org/c/coreboot/+/50897 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71c512fe884060e23ee26e7334c575c4c517b78d Gerrit-Change-Number: 50897 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AndreX Andraos <andrex.andraos(a)intel.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 01 Mar 2021 20:16:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry
by Angel Pons (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Furquan Shaikh, Wonkyu Kim, Bernardo Perez Priego, Srinidhi N Kaushik, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50897 ) Change subject: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/tigerlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/50897/comment/88b9d366_1f3d5f45 PS6, Line 357: CnviBtCore > Something like this would work, but `CnviBtAudioOffload` isn't a string. […] Er, no, it's correct. I confused it with `PchHdaTestPowerClockGating`. -- To view, visit https://review.coreboot.org/c/coreboot/+/50897 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71c512fe884060e23ee26e7334c575c4c517b78d Gerrit-Change-Number: 50897 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AndreX Andraos <andrex.andraos(a)intel.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 01 Mar 2021 20:16:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry
by Angel Pons (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Furquan Shaikh, Wonkyu Kim, Bernardo Perez Priego, Srinidhi N Kaushik, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50897 ) Change subject: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/tigerlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/50897/comment/494b2a4b_a081a9c9 PS6, Line 357: CnviBtCore > I just quickly looked at the FSP CNVi code. I am more toward your suggestion. […] Something like this would work, but `CnviBtAudioOffload` isn't a string. I think there may be a bug in the enum definition... I'll push a patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/50897 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71c512fe884060e23ee26e7334c575c4c517b78d Gerrit-Change-Number: 50897 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AndreX Andraos <andrex.andraos(a)intel.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 01 Mar 2021 20:13:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry
by Cliff Huang (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Furquan Shaikh, Wonkyu Kim, Angel Pons, Bernardo Perez Priego, Srinidhi N Kaushik, Patrick Rudolph. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50897 ) Change subject: soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/tigerlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/50897/comment/babdcf72_9bba2f1c PS6, Line 357: CnviBtCore > I thought about this at the beginning. […] I just quickly looked at the FSP CNVi code. I am more toward your suggestion. How about the following? dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI); if (is_dev_enabled(dev)) { params->CnviMode = 1; /* CNVi BT Core */ params->CnviBtCore = config->CnviBtCore; /* CNVi BT Audio Offload */ params->CnviBtAudioOffload = config->CnviBtAudioOffload; } else { params->CnviMode = 0; /* CNVi BT Core */ params->CnviBtCore = 0; /* CNVi BT Audio Offload */ params->CnviBtAudioOffload = "FORCE_DISABLE"; } NOTE: CnviMode = 0: disable; CnviMode = 1: AutoDectect. Still, letting board to enable/disable BT if needed. Also, It makes sense to include the BT audio Offload to part of it. I will also need to confirm. -- To view, visit https://review.coreboot.org/c/coreboot/+/50897 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71c512fe884060e23ee26e7334c575c4c517b78d Gerrit-Change-Number: 50897 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AndreX Andraos <andrex.andraos(a)intel.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 01 Mar 2021 20:06:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in libgfxinit[master]: Add support to switch LSPCON modes
by Angel Pons (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Nico Huber, Martin Roth. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/51133 ) Change subject: Add support to switch LSPCON modes ...................................................................... Patch Set 7: (2 comments) File common/hw-gfx-dp_dual_mode.ads: https://review.coreboot.org/c/libgfxinit/+/51133/comment/1391a3ab_41fd28e0 PS7, Line 32: LSPCON); Dead code https://review.coreboot.org/c/libgfxinit/+/51133/comment/f80aebdd_055e3332 PS7, Line 36: Auto_Configure Switch_LSPCON -- To view, visit https://review.coreboot.org/c/libgfxinit/+/51133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Idfa9bdff47a6591000cd5092d64a4cd4f8dbdc8d Gerrit-Change-Number: 51133 Gerrit-PatchSet: 7 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 19:57:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in libgfxinit[master]: Add support to switch LSPCON modes
by Angel Pons (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Nico Huber, Martin Roth. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/51133 ) Change subject: Add support to switch LSPCON modes ...................................................................... Patch Set 7: (1 comment) File common/hw-gfx-dp_dual_mode.adb: https://review.coreboot.org/c/libgfxinit/+/51133/comment/5f1d8df1_373df364 PS7, Line 118: Time.M_Delay (1); timeout helpers should exist somewhere -- To view, visit https://review.coreboot.org/c/libgfxinit/+/51133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Idfa9bdff47a6591000cd5092d64a4cd4f8dbdc8d Gerrit-Change-Number: 51133 Gerrit-PatchSet: 7 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 19:56:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit March 2021