coreboot-gerrit February 2021

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Change in coreboot[master]: soc/amd/picasso: set GPE0_LIMIT to 32 and move definitions to registers
by Felix Held (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50244 ) Change subject: soc/amd/picasso: set GPE0_LIMIT to 32 and move definitions to registers ...................................................................... soc/amd/picasso: set GPE0_LIMIT to 32 and move definitions to registers Picasso has 32 configurable GPEs, not only 28. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ia156e64e7a69764776f3af7597b680b8ddd4e650 --- M src/soc/amd/picasso/include/soc/southbridge.h 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/50244/1 diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h index f7edaad..43cddc8 100644 --- a/src/soc/amd/picasso/include/soc/southbridge.h +++ b/src/soc/amd/picasso/include/soc/southbridge.h @@ -77,6 +77,10 @@ #define PM_USB_ENABLE 0xef #define PM_USB_ALL_CONTROLLERS 0x7f +#define PM1_LIMIT 16 +#define GPE0_LIMIT 32 +#define TOTAL_BITS(a) (8 * sizeof(a)) + /* FCH MISC Registers 0xfed80e00 */ #define GPP_CLK_CNTRL 0x00 #define GPP_CLK0_REQ_SHIFT 0 @@ -137,10 +141,6 @@ #define FCH_LEGACY_UART_DECODE (ALINK_AHB_ADDRESS + 0x20) /* 0xfedc0020 */ -#define PM1_LIMIT 16 -#define GPE0_LIMIT 28 -#define TOTAL_BITS(a) (8 * sizeof(a)) - /* SATA Controller D11F0 */ #define SATA_MISC_CONTROL_REG 0x40 #define SATA_MISC_SUBCLASS_WREN BIT(0) -- To view, visit https://review.coreboot.org/c/coreboot/+/50244 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia156e64e7a69764776f3af7597b680b8ddd4e650 Gerrit-Change-Number: 50244 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: amd/common/block/acpi/pm_state: fix comparison in get_index_bit
by Felix Held (Code Review) 02 Feb '21

02 Feb '21

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50243 ) Change subject: amd/common/block/acpi/pm_state: fix comparison in get_index_bit ...................................................................... amd/common/block/acpi/pm_state: fix comparison in get_index_bit In the case of passing 32 as limit the code returned -1, but should have continued, since 32 is a valid value here. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I6ca341841bad62abcb4ea26a350c539813a29de7 --- M src/soc/amd/common/block/acpi/pm_state.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/50243/1 diff --git a/src/soc/amd/common/block/acpi/pm_state.c b/src/soc/amd/common/block/acpi/pm_state.c index a009718..05bb927 100644 --- a/src/soc/amd/common/block/acpi/pm_state.c +++ b/src/soc/amd/common/block/acpi/pm_state.c @@ -13,7 +13,7 @@ uint16_t i; uint32_t t; - if (limit >= TOTAL_BITS(uint32_t)) + if (limit > TOTAL_BITS(uint32_t)) return -1; /* get a mask of valid bits. Ex limit = 3, set bits 0-2 */ -- To view, visit https://review.coreboot.org/c/coreboot/+/50243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ca341841bad62abcb4ea26a350c539813a29de7 Gerrit-Change-Number: 50243 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/mi: Rename guybrush mainboard to monkey_island
by Mathew King (Code Review) 02 Feb '21

02 Feb '21

Mathew King has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/50005 ) Change subject: mb/google/mi: Rename guybrush mainboard to monkey_island ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/50005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0cd1cac2a4d697373d508f2260fdca4b88fdf10d Gerrit-Change-Number: 50005 Gerrit-PatchSet: 4 Gerrit-Owner: Mathew King <mathewk(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: mb/google/mi: Add guybrush baseboard
by Mathew King (Code Review) 02 Feb '21

02 Feb '21

Mathew King has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/50006 ) Change subject: mb/google/mi: Add guybrush baseboard ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/50006 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4594a30cb40b05ca480f4fcf15768b64a079b6c5 Gerrit-Change-Number: 50006 Gerrit-PatchSet: 4 Gerrit-Owner: Mathew King <mathewk(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/amd/cezanne: populate some FSP-M UPDs
by Raul Rangel (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50239 ) Change subject: soc/amd/cezanne: populate some FSP-M UPDs ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/cezanne/romstage.c: https://review.coreboot.org/c/coreboot/+/50239/comment/2bf27d15_50938c28 PS2, Line 19: 1 > no. in the mmio case the spacing between the registers might be either 1 or 4 bytes. […] Cezanne doesn't support a stride of 1 though. So I don't think we should be passing in an unsupported value. -- To view, visit https://review.coreboot.org/c/coreboot/+/50239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81a812662f921d0bf8d436238d338b6a1fa6a9ee Gerrit-Change-Number: 50239 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 02 Feb 2021 22:05:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: populate some FSP-M UPDs
by Felix Held (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50239 ) Change subject: soc/amd/cezanne: populate some FSP-M UPDs ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/cezanne/romstage.c: https://review.coreboot.org/c/coreboot/+/50239/comment/4cd64a9b_e874ba31 PS2, Line 19: 1 > Is this to handle the case of legacy IO? no. in the mmio case the spacing between the registers might be either 1 or 4 bytes. see src/drivers/uart/uart8250mem.c -- To view, visit https://review.coreboot.org/c/coreboot/+/50239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81a812662f921d0bf8d436238d338b6a1fa6a9ee Gerrit-Change-Number: 50239 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Tue, 02 Feb 2021 22:01:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/amd/fsp/cezanne: add UPD structs from FSP build
by Raul Rangel (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Justin Frodsham, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50242 ) Change subject: vendorcode/amd/fsp/cezanne: add UPD structs from FSP build ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File src/vendorcode/amd/fsp/cezanne/FspmUpd.h: https://review.coreboot.org/c/coreboot/+/50242/comment/e341a83d_f3b65652 PS1, Line 19: /** Offset 0x0050**/ uint32_t serial_port_baudrate; : /** Offset 0x0054**/ uint32_t serial_port_refclk; I'm assuming FSP-M is reconfiguring the UART? Could we make it not do that? -- To view, visit https://review.coreboot.org/c/coreboot/+/50242 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icade1d7bcab7b85cdd25c4114590eb23b914edcd Gerrit-Change-Number: 50242 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)protonmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Justin Frodsham <justin.frodsham(a)protonmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 02 Feb 2021 21:35:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: populate some FSP-M UPDs
by Raul Rangel (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50239 ) Change subject: soc/amd/cezanne: populate some FSP-M UPDs ...................................................................... Patch Set 2: (2 comments) File src/soc/amd/cezanne/romstage.c: https://review.coreboot.org/c/coreboot/+/50239/comment/ee37641c_cc96dcca PS2, Line 19: 1 Is this to handle the case of legacy IO? https://review.coreboot.org/c/coreboot/+/50239/comment/b38612c9_0327b218 PS2, Line 19: serial_port_stride Do we need to pass in the baud clock? Or does FSP-M assume the baud rate has already been set? -- To view, visit https://review.coreboot.org/c/coreboot/+/50239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81a812662f921d0bf8d436238d338b6a1fa6a9ee Gerrit-Change-Number: 50239 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 02 Feb 2021 21:33:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: populate some FSP-M UPDs
by Justin Frodsham (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Justin Frodsham has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50239 ) Change subject: soc/amd/cezanne: populate some FSP-M UPDs ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: Also looks good, this gets me all the way through FSP-M. -- To view, visit https://review.coreboot.org/c/coreboot/+/50239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81a812662f921d0bf8d436238d338b6a1fa6a9ee Gerrit-Change-Number: 50239 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 02 Feb 2021 21:26:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/amd/fsp/cezanne: add UPD structs from FSP build
by Justin Frodsham (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Justin Frodsham, Felix Held. Justin Frodsham has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50242 ) Change subject: vendorcode/amd/fsp/cezanne: add UPD structs from FSP build ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: Looks good! -- To view, visit https://review.coreboot.org/c/coreboot/+/50242 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icade1d7bcab7b85cdd25c4114590eb23b914edcd Gerrit-Change-Number: 50242 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)protonmail.com> Gerrit-Attention: Justin Frodsham <justin.frodsham(a)protonmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 02 Feb 2021 21:26:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit February 2021