coreboot-gerrit February 2021

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Change in coreboot[master]: soc/qualcomm/sc7180/aop_load_reset.c: Add missing <program_loading.h>
by Patrick Georgi (Code Review) 04 Feb '21

04 Feb '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50196 ) Change subject: soc/qualcomm/sc7180/aop_load_reset.c: Add missing <program_loading.h> ...................................................................... soc/qualcomm/sc7180/aop_load_reset.c: Add missing <program_loading.h> Change-Id: Ibb4bf488d9398240bf54f12b5b90d0f2a5a9119b Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50196 Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/qualcomm/sc7180/aop_load_reset.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/soc/qualcomm/sc7180/aop_load_reset.c b/src/soc/qualcomm/sc7180/aop_load_reset.c index eb90f86..86ee993 100644 --- a/src/soc/qualcomm/sc7180/aop_load_reset.c +++ b/src/soc/qualcomm/sc7180/aop_load_reset.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <cbfs.h> #include <console/console.h> +#include <program_loading.h> #include <soc/mmu.h> #include <soc/aop.h> #include <soc/clock.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/50196 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb4bf488d9398240bf54f12b5b90d0f2a5a9119b Gerrit-Change-Number: 50196 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/mediatek/mt8192/spm.c: Add missing <string.h>
by Patrick Georgi (Code Review) 04 Feb '21

04 Feb '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50168 ) Change subject: soc/mediatek/mt8192/spm.c: Add missing <string.h> ...................................................................... soc/mediatek/mt8192/spm.c: Add missing <string.h> Change-Id: I56a4e0fb42c881026f4ee1abe30f9b356af6a68f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50168 Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/mediatek/mt8192/spm.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/soc/mediatek/mt8192/spm.c b/src/soc/mediatek/mt8192/spm.c index f080a11..13eebc8 100644 --- a/src/soc/mediatek/mt8192/spm.c +++ b/src/soc/mediatek/mt8192/spm.c @@ -1,13 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <assert.h> -#include <cbfs.h> #include <console/console.h> #include <delay.h> #include <device/mmio.h> #include <soc/mcu_common.h> #include <soc/spm.h> #include <soc/symbols.h> +#include <string.h> #include <timer.h> #define SPM_SYSTEM_BASE_OFFSET 0x40000000 -- To view, visit https://review.coreboot.org/c/coreboot/+/50168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56a4e0fb42c881026f4ee1abe30f9b356af6a68f Gerrit-Change-Number: 50168 Gerrit-PatchSet: 5 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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Change in coreboot[master]: device/i2c_bus.c: Correct code style
by Angel Pons (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Frans Hendriks, Wim Vervoorn. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50190 ) Change subject: device/i2c_bus.c: Correct code style ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/50190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78ce97b0ce1587119a71893c867c2dd062552a31 Gerrit-Change-Number: 50190 Gerrit-PatchSet: 3 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Comment-Date: Thu, 04 Feb 2021 09:49:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/zork/var/shuboz: Adjust GPIO settings
by Kane Chen (Code Review) 04 Feb '21

04 Feb '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50277 to look at the new patch set (#2). Change subject: mb/google/zork/var/shuboz: Adjust GPIO settings ...................................................................... mb/google/zork/var/shuboz: Adjust GPIO settings 1. GPIO_4 to NC 2. GPIO_86 to NONE BUG=b:179333669 BRANCH=zork TEST=emerge-zork coreboot Signed-off-by: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Change-Id: I4342b2beb7fc755bee47ee4fad0023d7a6592c4b --- M src/mainboard/google/zork/variants/shuboz/gpio.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/50277/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50277 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4342b2beb7fc755bee47ee4fad0023d7a6592c4b Gerrit-Change-Number: 50277 Gerrit-PatchSet: 2 Gerrit-Owner: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amd/common/block/acpi/pm_state: fix comparison in get_index_bit
by Kyösti Mälkki (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Felix Held. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50243 ) Change subject: amd/common/block/acpi/pm_state: fix comparison in get_index_bit ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/50243/comment/00529de6_0e465b81 PS3, Line 10: continued, since 32 is a valid value here. And the case of limit > 32 should really be a BUG() or assert() since uint32t for the parameter 'value' is wrong then. I'll address this along the way. It's a static function, with only constants passed for limit. Compiler probably drops the comparison completely. -- To view, visit https://review.coreboot.org/c/coreboot/+/50243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ca341841bad62abcb4ea26a350c539813a29de7 Gerrit-Change-Number: 50243 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 04 Feb 2021 09:35:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/ocp/deltalake: Fill ECC type in romstage
by Angel Pons (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Anjaneya "Reddy" Chagam, Patrick Rudolph, Christian Walter, Jingle Hsu, Arthur Heymans, Morgan Jang. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50179 ) Change subject: mb/ocp/deltalake: Fill ECC type in romstage ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > I verified it's correct. Alright, thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/50179 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8370b3ee7d75914b895946b53923598adf87b522 Gerrit-Change-Number: 50179 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 04 Feb 2021 09:34:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Jingle Hsu <jingle_hsu(a)wiwynn.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: Modify USB 3.0 PHY parameters for galith
by Angel Pons (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Frank Chu. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50253 ) Change subject: mb/google/dedede: Modify USB 3.0 PHY parameters for galith ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/50253/comment/ffd145b1_e955a91e PS2, Line 7: galith > because galith keep going now Do 'galith' and 'galtic' refer to the same board? -- To view, visit https://review.coreboot.org/c/coreboot/+/50253 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66dc9b5a7280bfd42592b07f160f48797613fdd6 Gerrit-Change-Number: 50253 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-CC: Hank Lin <hank2_lin(a)pegatron.corp-partner.google.com> Gerrit-CC: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Thu, 04 Feb 2021 09:22:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/zork/variants/vilboz: Diasable ASPM L1.2 for SD card reader
by John Su (Code Review) 04 Feb '21

04 Feb '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50280 to look at the new patch set (#3). Change subject: mb/google/zork/variants/vilboz: Diasable ASPM L1.2 for SD card reader ...................................................................... mb/google/zork/variants/vilboz: Diasable ASPM L1.2 for SD card reader From bayhub vendor feedback, OZ711LV2 only set to L1.1 for AMD project, because the reason is AMD’s L1.2 capability is not good causing device lost in past experience, so vilboz need set L1.1 in RC and device both side. BUG=b:177955523 BRANCH=zork TEST=check PCIE_L1_PM_SUB_CNTL 0x378[3:0]=0xA Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> Change-Id: I2f24c08411eabb1579c76aaafbe3eb054db54f69 --- M src/mainboard/google/zork/variants/vilboz/variant.c 1 file changed, 47 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/50280/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/50280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2f24c08411eabb1579c76aaafbe3eb054db54f69 Gerrit-Change-Number: 50280 Gerrit-PatchSet: 3 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/zork/variants/vilboz: Diasable ASPM L1.2 for SD card reader
by John Su (Code Review) 04 Feb '21

04 Feb '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50280 to look at the new patch set (#2). Change subject: mb/google/zork/variants/vilboz: Diasable ASPM L1.2 for SD card reader ...................................................................... mb/google/zork/variants/vilboz: Diasable ASPM L1.2 for SD card reader From bayhub vendor feedback, OZ711LV2 only set to L1.1 for AMD project, because the reason is AMD’s L1.2 capability is not good causing device lost in past experience,so vilboz need set L1.1 in RC and device both side. BUG=b:177955523 BRANCH=zork TEST=check PCIE_L1_PM_SUB_CNTL 0x378[3:0]=0xA Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> Change-Id: I2f24c08411eabb1579c76aaafbe3eb054db54f69 --- M src/mainboard/google/zork/variants/vilboz/variant.c 1 file changed, 47 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/50280/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2f24c08411eabb1579c76aaafbe3eb054db54f69 Gerrit-Change-Number: 50280 Gerrit-PatchSet: 2 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8192: Use LZ4 compression for MCUs
by Hung-Te Lin (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Martin Roth, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50278 ) Change subject: soc/mediatek/mt8192: Use LZ4 compression for MCUs ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida35e7f6e0572ad43082e53bcc69bc708cf7da44 Gerrit-Change-Number: 50278 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.corp-partner.google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 04 Feb 2021 08:55:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit February 2021