coreboot-gerrit February 2021

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Change in coreboot[master]: soc/intel/*: select MP PPI services version
by Aamir Bohra (Code Review) 04 Feb '21

04 Feb '21

Aamir Bohra has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/50226 ) Change subject: soc/intel/*: select MP PPI services version ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/50226 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c1ef6c5dde359b57412854f6e42fa7acbb1172f Gerrit-Change-Number: 50226 Gerrit-PatchSet: 4 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: drivers/intel/fsp2_0: Add support for MP services2 PPI
by Aamir Bohra (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Furquan Shaikh, Martin Roth, Meera Ravindranath, Aamir Bohra, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Subrata Banik, Meera Ravindranath, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/49474 to look at the new patch set (#9). Change subject: drivers/intel/fsp2_0: Add support for MP services2 PPI ...................................................................... drivers/intel/fsp2_0: Add support for MP services2 PPI Add support for MP services2 PPIs, which is slight modification over MP services 1 PPIs. A new API StartupAllCPUs have been added to allow running a task on BSP and all APs. Also the EFI_PEI_SERVICES parameter has been removed from all MP PPI APIs. This implementation also selects the respective MP services PPI version supported for SoCs BUG=b:169196864 Change-Id: Id74baf17fb90147d229c78be90268fdc3ec1badc Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h M src/drivers/intel/fsp2_0/ppi/Kconfig M src/drivers/intel/fsp2_0/ppi/Makefile.inc A src/drivers/intel/fsp2_0/ppi/mp_service1.c A src/drivers/intel/fsp2_0/ppi/mp_service2.c M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c M src/include/efi/efi_datatype.h M src/soc/intel/alderlake/Kconfig M src/soc/intel/elkhartlake/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/jasperlake/Kconfig M src/soc/intel/tigerlake/Kconfig A src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Ppi/MpServices2.h 14 files changed, 531 insertions(+), 79 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/49474/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/49474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id74baf17fb90147d229c78be90268fdc3ec1badc Gerrit-Change-Number: 49474 Gerrit-PatchSet: 9 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amd/common/block/acpi/pm_state: fix comparison in get_index_bit
by Felix Held (Code Review) 04 Feb '21

04 Feb '21

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50243 ) Change subject: amd/common/block/acpi/pm_state: fix comparison in get_index_bit ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/50243/comment/2c5958e0_6dd27f3d PS3, Line 10: continued, since 32 is a valid value here. > And the case of limit > 32 should really be a BUG() or assert() since uint32t for the parameter 'val […] good point. since you wrote that you're going to look into this, i won't push a patch for that -- To view, visit https://review.coreboot.org/c/coreboot/+/50243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ca341841bad62abcb4ea26a350c539813a29de7 Gerrit-Change-Number: 50243 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Thu, 04 Feb 2021 16:00:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: Add support for MP services2 PPI
by Tim Wawrzynczak (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Furquan Shaikh, Martin Roth, Meera Ravindranath, Aamir Bohra, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49474 ) Change subject: drivers/intel/fsp2_0: Add support for MP services2 PPI ...................................................................... Patch Set 8: (3 comments) File src/drivers/intel/fsp2_0/Kconfig: https://review.coreboot.org/c/coreboot/+/49474/comment/0e41f421_004d225d PS6, Line 267: : if FSP_PEIM_TO_PEIM_INTERFACE : source "src/drivers/intel/fsp2_0/ppi/Kconfig" : endif : > This gets sourced from src/Makefile. […] It's redundant, src/Kconfig already has `source "src/drivers/*/*/*/Kconfig` File src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h: https://review.coreboot.org/c/coreboot/+/49474/comment/76689570_0a115e84 PS6, Line 49: /* : * switches the requested AP to be the BSP : */ : efi_return_status_t mp_switch_bsp(void); : : /* : * enable or disable an AP. This service may only be called from the BSP. : */ : efi_return_status_t mp_enable_disable_ap(void); : > we can keep them as placeholders for now? Is it ok? We could just have a `efi_return_status_t fsp_ppi_unsupported(void) { return FSP_UNSUPPORTED; }` as an example and use that function pointer instead File src/drivers/intel/fsp2_0/ppi/mp_service1.c: https://review.coreboot.org/c/coreboot/+/49474/comment/69cc8a09_81ef060f PS6, Line 12: nit: extra lines -- To view, visit https://review.coreboot.org/c/coreboot/+/49474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id74baf17fb90147d229c78be90268fdc3ec1badc Gerrit-Change-Number: 49474 Gerrit-PatchSet: 8 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 04 Feb 2021 16:00:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: populate some FSP-M UPDs
by Raul Rangel (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50239 ) Change subject: soc/amd/cezanne: populate some FSP-M UPDs ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81a812662f921d0bf8d436238d338b6a1fa6a9ee Gerrit-Change-Number: 50239 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 04 Feb 2021 15:53:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso/fch: add missing iomap.h include
by Felix Held (Code Review) 04 Feb '21

04 Feb '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50260 ) Change subject: soc/amd/picasso/fch: add missing iomap.h include ...................................................................... soc/amd/picasso/fch: add missing iomap.h include Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Iea9666fe4f61fb503fee4060a90ec75e2d70c24f Reviewed-on: https://review.coreboot.org/c/coreboot/+/50260 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/soc/amd/picasso/fch.c 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index e6cd51a..5d62e8e 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -17,6 +17,7 @@ #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/i2c.h> +#include <soc/iomap.h> #include <soc/southbridge.h> #include <soc/smi.h> #include <soc/amd_pci_int_defs.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/50260 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea9666fe4f61fb503fee4060a90ec75e2d70c24f Gerrit-Change-Number: 50260 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/intel/fsp2_0: Add support for MP services2 PPI
by Aamir Bohra (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Furquan Shaikh, Martin Roth, Tim Wawrzynczak, Meera Ravindranath, Andrey Petrov, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Subrata Banik, Meera Ravindranath, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/49474 to look at the new patch set (#8). Change subject: drivers/intel/fsp2_0: Add support for MP services2 PPI ...................................................................... drivers/intel/fsp2_0: Add support for MP services2 PPI Add support for MP services2 PPIs, which is slight modification over MP services 1 PPIs. A new API StartupAllCPUs have been added to allow running a task on BSP and all APs. Also the EFI_PEI_SERVICES parameter has been removed from all MP PPI APIs. BUG=b:169196864 Change-Id: Id74baf17fb90147d229c78be90268fdc3ec1badc Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h M src/drivers/intel/fsp2_0/ppi/Kconfig M src/drivers/intel/fsp2_0/ppi/Makefile.inc A src/drivers/intel/fsp2_0/ppi/mp_service1.c A src/drivers/intel/fsp2_0/ppi/mp_service2.c M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c M src/include/efi/efi_datatype.h A src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Ppi/MpServices2.h 9 files changed, 526 insertions(+), 74 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/49474/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/49474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id74baf17fb90147d229c78be90268fdc3ec1badc Gerrit-Change-Number: 49474 Gerrit-PatchSet: 8 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/include: Clean up some includes
by HAOUAS Elyes (Code Review) 04 Feb '21

04 Feb '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44207 ) Change subject: src/include: Clean up some includes ...................................................................... src/include: Clean up some includes Change-Id: I69c4d21273c9fb400449fd39274f15c0be013402 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/include/bootblock_common.h M src/include/bootsplash.h M src/include/cpu/amd/amd64_save_state.h M src/include/cpu/intel/em64t100_save_state.h M src/include/cpu/intel/em64t101_save_state.h M src/include/cpu/x86/legacy_save_state.h M src/include/device/smbus_def.h M src/include/option.h M src/include/symbols.h M src/include/timer.h 10 files changed, 9 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/44207/1 diff --git a/src/include/bootblock_common.h b/src/include/bootblock_common.h index 97ccf96..59eb83a 100644 --- a/src/include/bootblock_common.h +++ b/src/include/bootblock_common.h @@ -5,8 +5,8 @@ #include <arch/cpu.h> #include <main_decl.h> +#include <stdint.h> #include <timestamp.h> -#include <types.h> /* * These are defined as weak no-ops that can be overridden by mainboard/SoC. diff --git a/src/include/bootsplash.h b/src/include/bootsplash.h index d5aecf8..9ba730d 100644 --- a/src/include/bootsplash.h +++ b/src/include/bootsplash.h @@ -3,8 +3,6 @@ #ifndef __BOOTSPLASH_H__ #define __BOOTSPLASH_H__ -#include <types.h> - /** * Sets up the framebuffer with the bootsplash.jpg from cbfs. * Returns 0 on success diff --git a/src/include/cpu/amd/amd64_save_state.h b/src/include/cpu/amd/amd64_save_state.h index 08b700a..27b1ecf 100644 --- a/src/include/cpu/amd/amd64_save_state.h +++ b/src/include/cpu/amd/amd64_save_state.h @@ -4,8 +4,8 @@ #define __AMD64_SAVE_STATE_H__ #endif -#include <types.h> #include <cpu/x86/smm.h> +#include <stdint.h> /* AMD64 x86 SMM State-Save Area * starts @ 0x7e00 diff --git a/src/include/cpu/intel/em64t100_save_state.h b/src/include/cpu/intel/em64t100_save_state.h index 8596ce5..c510d4b 100644 --- a/src/include/cpu/intel/em64t100_save_state.h +++ b/src/include/cpu/intel/em64t100_save_state.h @@ -3,8 +3,8 @@ #ifndef __EM64T100_SAVE_STATE_H__ #define __EM64T100_SAVE_STATE_H__ -#include <types.h> #include <cpu/x86/smm.h> +#include <stdint.h> /* Intel Revision 30100 SMM State-Save Area */ diff --git a/src/include/cpu/intel/em64t101_save_state.h b/src/include/cpu/intel/em64t101_save_state.h index 2e4e0d5..ce5a974 100644 --- a/src/include/cpu/intel/em64t101_save_state.h +++ b/src/include/cpu/intel/em64t101_save_state.h @@ -3,9 +3,8 @@ #ifndef __EM64T101_SAVE_STATE_H__ #define __EM64T101_SAVE_STATE_H__ -#include <types.h> #include <cpu/x86/smm.h> - +#include <stdint.h> /* Intel Revision 30101 SMM State-Save Area * The following processor architectures use this: diff --git a/src/include/cpu/x86/legacy_save_state.h b/src/include/cpu/x86/legacy_save_state.h index 4c9923c..c557e28 100644 --- a/src/include/cpu/x86/legacy_save_state.h +++ b/src/include/cpu/x86/legacy_save_state.h @@ -3,7 +3,7 @@ #ifndef __X86_LEGACY_SAVE_STATE_H__ #define __X86_LEGACY_SAVE_STATE_H__ -#include <types.h> +#include <stdint.h> /* Legacy x86 SMM State-Save Area * starts @ 0x7e00 diff --git a/src/include/device/smbus_def.h b/src/include/device/smbus_def.h index 61d7861..ef9fb56 100644 --- a/src/include/device/smbus_def.h +++ b/src/include/device/smbus_def.h @@ -1,7 +1,7 @@ #ifndef DEVICE_SMBUS_DEF_H #define DEVICE_SMBUS_DEF_H -#include <types.h> +#include <commonlib/bsd/cb_err.h> /* Error results are negative success is >= 0 */ #define SMBUS_ERROR CB_ERR diff --git a/src/include/option.h b/src/include/option.h index 6b4e6a9..09a29f2 100644 --- a/src/include/option.h +++ b/src/include/option.h @@ -3,7 +3,7 @@ #ifndef _OPTION_H_ #define _OPTION_H_ -#include <types.h> +#include <commonlib/bsd/cb_err.h> void sanitize_cmos(void); diff --git a/src/include/symbols.h b/src/include/symbols.h index f84672e..c081efc 100644 --- a/src/include/symbols.h +++ b/src/include/symbols.h @@ -3,7 +3,8 @@ #ifndef __SYMBOLS_H #define __SYMBOLS_H -#include <types.h> +#include <rules.h> +#include <stdint.h> extern u8 _dram[]; diff --git a/src/include/timer.h b/src/include/timer.h index 9b7a05e..0bb8666 100644 --- a/src/include/timer.h +++ b/src/include/timer.h @@ -2,8 +2,6 @@ #ifndef TIMER_H #define TIMER_H -#include <types.h> - #define NSECS_PER_SEC 1000000000 #define USECS_PER_SEC 1000000 #define MSECS_PER_SEC 1000 -- To view, visit https://review.coreboot.org/c/coreboot/+/44207 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69c4d21273c9fb400449fd39274f15c0be013402 Gerrit-Change-Number: 44207 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: Documentation: Codify some guidelines for headers and chain-including
by Kyösti Mälkki (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Martin Roth, Julius Werner. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50247 ) Change subject: Documentation: Codify some guidelines for headers and chain-including ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > I'm trying to just explain the general reasons where chain-including should be acceptable. […] I'd rather have Elyes ask before pushing 20 changes on the topic for review too. Or have him maintain such list under Documentation. We probably have some more like with <console/console.h> and <smp/xxxx.h>. -- To view, visit https://review.coreboot.org/c/coreboot/+/50247 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbcde306a814f52b3a41b58c7a33bdd99b0187e0 Gerrit-Change-Number: 50247 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 04 Feb 2021 15:19:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: Add support for MP services2 PPI
by Aamir Bohra (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Furquan Shaikh, Martin Roth, Tim Wawrzynczak, Meera Ravindranath, Andrey Petrov, Patrick Rudolph. Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49474 ) Change subject: drivers/intel/fsp2_0: Add support for MP services2 PPI ...................................................................... Patch Set 6: (17 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/49474/comment/d50b2107_1e0b0eb3 PS6, Line 13: > BUG=b:169196864 Done File src/drivers/intel/fsp2_0/Kconfig: https://review.coreboot.org/c/coreboot/+/49474/comment/7a80a7d1_ee7a7431 PS6, Line 267: : if FSP_PEIM_TO_PEIM_INTERFACE : source "src/drivers/intel/fsp2_0/ppi/Kconfig" : endif : > Why was this dropped? This gets sourced from src/Makefile.inc, it was causing lint error due to redundant symbol allocation. File src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h: https://review.coreboot.org/c/coreboot/+/49474/comment/676a0287_f386623c PS6, Line 18: efi_pei_mp_services_ppi > I think it would be good to just set this to void so that we can void having to provide the definiti […] Done https://review.coreboot.org/c/coreboot/+/49474/comment/c7dc9f26_f7982d96 PS6, Line 19: : /* : * get the number of logical processor in the platform : */ > nit: Recommended comment style for single line comments is either /* ... […] Done https://review.coreboot.org/c/coreboot/+/49474/comment/92a4d463_83342be8 PS6, Line 36: ) > I think you are going to need an additional parameter here to decide whether the procedure should be […] Ok. I can push a follow up CL for that. https://review.coreboot.org/c/coreboot/+/49474/comment/d6006391_28429d7c PS6, Line 41: ) > What about timeout_usec? Added to params now. Initially it was default to 1000 * USECS_PER_MSEC as per mp_run_on_all_cpus https://review.coreboot.org/c/coreboot/+/49474/comment/cc3f0132_4934a90f PS6, Line 49: /* : * switches the requested AP to be the BSP : */ : efi_return_status_t mp_switch_bsp(void); : : /* : * enable or disable an AP. This service may only be called from the BSP. : */ : efi_return_status_t mp_enable_disable_ap(void); : > These return FSP_UNSUPPORTED. […] we can keep them as placeholders for now? Is it ok? File src/drivers/intel/fsp2_0/ppi/Kconfig: PS6: > I think we can simplify this file somewhat. […] Done File src/drivers/intel/fsp2_0/ppi/Makefile.inc: https://review.coreboot.org/c/coreboot/+/49474/comment/7f0b4316_043e75a7 PS6, Line 3: CONFIG_USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI > And this can be CONFIG_MP_SERVICES_PPI Done https://review.coreboot.org/c/coreboot/+/49474/comment/72839fd8_7fbb82cb PS6, Line 4: CONFIG_FSP_USES_MP_SERVICES_PPI > ... […] Done File src/drivers/intel/fsp2_0/ppi/mp_service1.c: https://review.coreboot.org/c/coreboot/+/49474/comment/b37ace9f_c766a223 PS6, Line 13: > remove extra blank lines. Done https://review.coreboot.org/c/coreboot/+/49474/comment/33af0316_3ab7deb3 PS6, Line 61: /* : * EDK2 UEFIPKG Open Source MP Service PPI to be installed : */ > Single line comment style: // or /* ... […] Done File src/drivers/intel/fsp2_0/ppi/mp_service2.c: https://review.coreboot.org/c/coreboot/+/49474/comment/e539d564_fa56c1fc PS6, Line 14: > extra blank line not required. Done https://review.coreboot.org/c/coreboot/+/49474/comment/f25de25b_39d83a2b PS6, Line 69: /* : * EDK2 UEFIPKG Open Source MP Services 2 PPI to be installed : */ : > Use single line comment style. Done File src/include/efi/efi_datatype.h: https://review.coreboot.org/c/coreboot/+/49474/comment/406f0b3c_ec40014f PS6, Line 9: #include <Ppi/MpServices.h> : #include <Ppi/MpServices2.h> > I don't think we should be including either of these here. Done https://review.coreboot.org/c/coreboot/+/49474/comment/90d2fa39_57172465 PS6, Line 59: #if CONFIG(FSP_USES_MP_SERVICES2_PPI) : typedef EDKII_PEI_MP_SERVICES2_PPI efi_pei_mp_services_ppi; : #else : typedef EFI_PEI_MP_SERVICES_PPI efi_pei_mp_services_ppi; : typedef EFI_PEI_SERVICES efi_pei_services; : #endif > I think these can be moved to mp_service1.c and mp_service2.c. Done File src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Ppi/MpServices2.h: PS6: > This file is not really present in UDK2017. I don't think we should be adding this here. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/49474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id74baf17fb90147d229c78be90268fdc3ec1badc Gerrit-Change-Number: 49474 Gerrit-PatchSet: 6 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 04 Feb 2021 14:37:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit February 2021