coreboot-gerrit February 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/amd/picasso: add UPD for RV2 USB3 phy setting adjust
by Martin Roth (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Kevin Chiu, chris wang, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50240 ) Change subject: soc/amd/picasso: add UPD for RV2 USB3 phy setting adjust ...................................................................... Patch Set 10: (1 comment) File src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb: https://review.coreboot.org/c/coreboot/+/50240/comment/7ff3be65_bdeee6de PS10, Line 138: "0" Does this need to be 1? If it's 0, nothing gets updated, right? -- To view, visit https://review.coreboot.org/c/coreboot/+/50240 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d5f69e840952cc5171af1ce8597628d1bede5cb Gerrit-Change-Number: 50240 Gerrit-PatchSet: 10 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: chris wang <Chris.Wang(a)amd.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 04 Feb 2021 18:05:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI
by Tim Wawrzynczak (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Furquan Shaikh, Aamir Bohra. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50275 ) Change subject: intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04acf1bc3a3739b31d6e9d01b6aa97542378754f Gerrit-Change-Number: 50275 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Comment-Date: Thu, 04 Feb 2021 17:37:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: intel: Drop FSP_PEIM_TO_PEIM_INTERFACE
by Tim Wawrzynczak (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Furquan Shaikh, Aamir Bohra. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50274 ) Change subject: intel: Drop FSP_PEIM_TO_PEIM_INTERFACE ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50274 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0664f09d85f5be372d19925d47034c76aeeef2ae Gerrit-Change-Number: 50274 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Comment-Date: Thu, 04 Feb 2021 17:36:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: add UPD for RV2 USB3 phy setting adjust
by chris wang (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Martin Roth, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Chris Wang, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50240 to look at the new patch set (#9). Change subject: soc/amd/picasso: add UPD for RV2 USB3 phy setting adjust ...................................................................... soc/amd/picasso: add UPD for RV2 USB3 phy setting adjust add UPD for RV2 USB3 phy setting adjust Usb 3.1 PHY Parameters: 1. RX_EQ_DELTA_IQ_OVRD_VAL -Override value for rx_eq_delta_iq. Range 0-0xF 2. RX_EQ_DELTA_IQ_OVRD_EN -Enable override value for rx_eq_delta_iq. Range 0-0x1 3. Override value for rx_vref_ctrl. Range 0 - 0x1F 4. Enable override value for rx_vref_ctrl. Range 0 - 0x1 5. Override value for tx_vboost_lvl: 0 - 0x7. 6. Enable override value for tx_vboost_lvl. Range: 0 - 0x1 7. Override value for rx_vref_ctrl. Range 0 - 0x1F 8. Enable override value for rx_vref_ctrl. Range 0 - 0x1 9. Override value for tx_vboost_lvl: 0 - 0x7. 10. Enable override value for tx_vboost_lvl. Range: 0 - 0x1 BUG=b:175192931 TEST=Build/verify the valule will been apply on dirinboz Change-Id: I1d5f69e840952cc5171af1ce8597628d1bede5cb Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com> --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/fsp_params.c M src/vendorcode/amd/fsp/picasso/FspsUpd.h 5 files changed, 143 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/50240/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/50240 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d5f69e840952cc5171af1ce8597628d1bede5cb Gerrit-Change-Number: 50240 Gerrit-PatchSet: 9 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/gigabyte/ga-h61m-series: Drop broken thermal.asl
by Sumeet R Pawnikar (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Nico Huber, Angel Pons, Arthur Heymans. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49927 ) Change subject: mb/gigabyte/ga-h61m-series: Drop broken thermal.asl ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/49927 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d62462fb7ddc788d08489bf82b110aeae6a1ffc Gerrit-Change-Number: 49927 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 04 Feb 2021 17:15:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer: Change cTDP level to level 2 (15W)
by Sumeet R Pawnikar (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Derek Huang, Patrick Rudolph. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50105 ) Change subject: mb/google/volteer: Change cTDP level to level 2 (15W) ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Did you get chance to check any performance impact due to this change ? -- To view, visit https://review.coreboot.org/c/coreboot/+/50105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4420a6a2e463b0a6bd7eb4b81f6a4fb975895ea3 Gerrit-Change-Number: 50105 Gerrit-PatchSet: 3 Gerrit-Owner: Derek Huang <derek.huang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Derek Huang <derek.huang(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 04 Feb 2021 17:14:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0/memory_init: check if UPD struct has expected size
by Felix Held (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Furquan Shaikh, Marshall Dawson, Meera Ravindranath, Andrey Petrov, Patrick Rudolph. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50241 ) Change subject: drivers/intel/fsp2_0/memory_init: check if UPD struct has expected size ...................................................................... Patch Set 1: (1 comment) File src/drivers/intel/fsp2_0/memory_init.c: https://review.coreboot.org/c/coreboot/+/50241/comment/1388675f_78bfdc52 PS1, Line 242: != > What about <= instead of !=? Assuming UPD only grows at the end, that would allow flexibility to up […] you mean >, since <= would be break the good case as well? if hdr->cfg_region_size is bigger than sizeof(FSPM_UPD) it's a non-recoverable error and we should call die(), but doing a printk(BIOS_ERR, ...) in the hdr->cfg_region_size < sizeof(FSPM_UPD) case, but continuing would be an option -- To view, visit https://review.coreboot.org/c/coreboot/+/50241 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7e9f6f20d0091bbb4abfd42abb40b485da2079d Gerrit-Change-Number: 50241 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 04 Feb 2021 16:50:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI
by Aamir Bohra (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak. Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50275 ) Change subject: intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04acf1bc3a3739b31d6e9d01b6aa97542378754f Gerrit-Change-Number: 50275 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Thu, 04 Feb 2021 16:39:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: intel: Drop FSP_PEIM_TO_PEIM_INTERFACE
by Aamir Bohra (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak. Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50274 ) Change subject: intel: Drop FSP_PEIM_TO_PEIM_INTERFACE ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50274 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0664f09d85f5be372d19925d47034c76aeeef2ae Gerrit-Change-Number: 50274 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Thu, 04 Feb 2021 16:39:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: Add support for MP services2 PPI
by Aamir Bohra (Code Review) 04 Feb '21

04 Feb '21

Attention is currently required from: Furquan Shaikh, Martin Roth, Tim Wawrzynczak, Meera Ravindranath, Andrey Petrov, Patrick Rudolph. Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49474 ) Change subject: drivers/intel/fsp2_0: Add support for MP services2 PPI ...................................................................... Patch Set 9: (3 comments) File src/drivers/intel/fsp2_0/Kconfig: https://review.coreboot.org/c/coreboot/+/49474/comment/b55c2bda_a6c5447d PS6, Line 267: : if FSP_PEIM_TO_PEIM_INTERFACE : source "src/drivers/intel/fsp2_0/ppi/Kconfig" : endif : > It's redundant, src/Kconfig already has `source "src/drivers/*/*/*/Kconfig` yeah. File src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h: https://review.coreboot.org/c/coreboot/+/49474/comment/4aecfe34_6f24e8c7 PS6, Line 49: /* : * switches the requested AP to be the BSP : */ : efi_return_status_t mp_switch_bsp(void); : : /* : * enable or disable an AP. This service may only be called from the BSP. : */ : efi_return_status_t mp_enable_disable_ap(void); : > We could just have a `efi_return_status_t fsp_ppi_unsupported(void) { return FSP_UNSUPPORTED; }` as […] wanted to match to : EDKII_PEI_MP_SERVICES2_PPI mMpServices2Ppi = { EdkiiPeiGetNumberOfProcessors, EdkiiPeiGetProcessorInfo, EdkiiPeiStartupAllAPs, EdkiiPeiStartupThisAP, EdkiiPeiSwitchBSP, EdkiiPeiEnableDisableAP, EdkiiPeiWhoAmI, EdkiiPeiStartupAllCPUs }; As I understand are you suggesting below? EDKII_PEI_MP_SERVICES2_PPI mMpServices2Ppi = { EdkiiPeiGetNumberOfProcessors, EdkiiPeiGetProcessorInfo, EdkiiPeiStartupAllAPs, EdkiiPeiStartupThisAP, fsp_ppi_unsupported, fsp_ppi_unsupported, EdkiiPeiWhoAmI, EdkiiPeiStartupAllCPUs }; File src/drivers/intel/fsp2_0/ppi/mp_service1.c: https://review.coreboot.org/c/coreboot/+/49474/comment/4d71611c_15b91d8a PS6, Line 12: > nit: extra lines Done -- To view, visit https://review.coreboot.org/c/coreboot/+/49474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id74baf17fb90147d229c78be90268fdc3ec1badc Gerrit-Change-Number: 49474 Gerrit-PatchSet: 9 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 04 Feb 2021 16:27:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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coreboot-gerrit February 2021