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Change subject: soc/intel/alderlake: Add support for ADL-N PCH
......................................................................
soc/intel/alderlake: Add support for ADL-N PCH
Introduce the `SOC_INTEL_ALDERLAKE_PCH_N` Kconfig option and
use it to specify the correct amount of PCIe I/O.
Document number 645550 indicates that Alder Lake-N has
12 PCH root ports and no CPU root ports.
Document number 645548 indicates ADL-N has 5 clock sources
and 5 clock request signals.
Signed-off-by: Usha P <usha.p(a)intel.com>
Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904
---
M src/soc/intel/alderlake/Kconfig
1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/59752/4
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#3).
Change subject: soc/intel/alderlake: Add support for ADL-N PCH
......................................................................
soc/intel/alderlake: Add support for ADL-N PCH
Introduce the `SOC_INTEL_ALDERLAKE_PCH_N` Kconfig option and
use it to specify the correct amount of PCIe I/O.
Document number 645550 indicates that Alder Lake-N has
9 PCH root ports and no CPU root ports.
Document number 645548 indicates ADL-N has 5 clock sources
and 5 clock request signals.
Signed-off-by: Usha P <usha.p(a)intel.com>
Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904
---
M src/soc/intel/alderlake/Kconfig
1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/59752/3
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Change subject: mb/google/zork/var/shuboz: Add fw_config probe for ALC5682-VD & VS
......................................................................
Patch Set 5:
(1 comment)
File src/mainboard/google/zork/variants/shuboz/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/59558/comment/90ab9539_1dc07fae
PS5, Line 2: fw_config
> Hi Reka Norman, […]
Thanks Kane. I've added a comment to https://crrev.com/c/3226182 explaining what I think the issue is.
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Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59756 )
Change subject: Documentatiion/mb/facebook/fbg1701.md: Update memory information
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59756/comment/60cce9a6_2d00e3f0
PS2, Line 7: Documentatiion
> Documentation
The patch is already merged.
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Shon Wang has uploaded a new patch set (#8) to the change originally created by Kevin Chiu. ( https://review.coreboot.org/c/coreboot/+/59304 )
Change subject: mb/google/brya/var/vell: update overridetree
......................................................................
mb/google/brya/var/vell: update overridetree
Init basic override devicetree based on schematice
BUG=b:205908918
TEST=emerge-brya coreboot
Change-Id: Ibaa910eb1c5584197907963781258035c668298e
Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com>
---
M src/mainboard/google/brya/Kconfig.name
M src/mainboard/google/brya/variants/vell/overridetree.cb
2 files changed, 371 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/59304/8
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Change subject: mb/google/brya/var/vell: update overridetree
......................................................................
Patch Set 7:
(1 comment)
File src/mainboard/google/brya/variants/vell/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/59304/comment/a1c8e85f_ebf67710
PS6, Line 75: # Internal panel on the first port of the graphics chip
> FYI we are adding a _HID to this device for our 5. […]
Done
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Change subject: mb/google/brya/var/vell: update overridetree
......................................................................
Patch Set 7:
(3 comments)
File src/mainboard/google/brya/variants/vell/overridetree.cb:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134793):
https://review.coreboot.org/c/coreboot/+/59304/comment/8b54312f_4ac28dfd
PS7, Line 70:
trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134793):
https://review.coreboot.org/c/coreboot/+/59304/comment/483b9e24_81d1c8b6
PS7, Line 73:
trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134793):
https://review.coreboot.org/c/coreboot/+/59304/comment/82e29428_ea57aa21
PS7, Line 75:
trailing whitespace
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Shon Wang has uploaded a new patch set (#7) to the change originally created by Kevin Chiu. ( https://review.coreboot.org/c/coreboot/+/59304 )
Change subject: mb/google/brya/var/vell: update overridetree
......................................................................
mb/google/brya/var/vell: update overridetree
Init basic override devicetree based on schematice
BUG=b:205908918
TEST=emerge-brya coreboot
Change-Id: Ibaa910eb1c5584197907963781258035c668298e
Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com>
---
M src/mainboard/google/brya/Kconfig.name
M src/mainboard/google/brya/variants/vell/overridetree.cb
2 files changed, 378 insertions(+), 3 deletions(-)
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