coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: Documentation: Improve x86_64
by Patrick Rudolph (Code Review) 04 Dec '21

04 Dec '21

Attention is currently required from: Tim Wawrzynczak, Paul Menzel, Angel Pons, Patrick Rudolph. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56017 ) Change subject: Documentation: Improve x86_64 ...................................................................... Patch Set 8: (29 comments) File Documentation/arch/x86/x86_64.md: https://review.coreboot.org/c/coreboot/+/56017/comment/ddd43ccc_838fff0a PS7, Line 4: In coreboot every stage (when enabled) is built for x86_64, > When enabled, every coreboot stage is built for x86_64, Done https://review.coreboot.org/c/coreboot/+/56017/comment/4a054940_b73589a0 PS7, Line 11: it > What does `it` refer to? Done https://review.coreboot.org/c/coreboot/+/56017/comment/5f29093e_99c2ffd4 PS7, Line 15: supports > must support Done https://review.coreboot.org/c/coreboot/+/56017/comment/3f2d09ff_2e81800a PS7, Line 15: This is the case for Pentium 4 or : compatible CPUs. > Not all Pentium 4's support x86_64, only Cedar Mill and some Prescott models do. […] Done https://review.coreboot.org/c/coreboot/+/56017/comment/df2fff81_84a17f61 PS7, Line 17: is > must be Done https://review.coreboot.org/c/coreboot/+/56017/comment/f159f44f_4e9832a6 PS7, Line 23: supports > must support Done https://review.coreboot.org/c/coreboot/+/56017/comment/ff58a070_8e042e1e PS7, Line 29: generates > must generate Done https://review.coreboot.org/c/coreboot/+/56017/comment/e0ad1388_2ac14c2c PS7, Line 34: have > must have Done https://review.coreboot.org/c/coreboot/+/56017/comment/f11bda01_6b830177 PS7, Line 34: are > must be Done https://review.coreboot.org/c/coreboot/+/56017/comment/8ad55438_eeaab0ff PS7, Line 36: those > nit: these Done https://review.coreboot.org/c/coreboot/+/56017/comment/0d88c108_e83c92db PS7, Line 36: compability > Still not fixed: compa*ti*bility Done https://review.coreboot.org/c/coreboot/+/56017/comment/4d2db10f_349f1f36 PS7, Line 40: phase > plural `phases`? Done https://review.coreboot.org/c/coreboot/+/56017/comment/bb063712_fda1ad5d PS7, Line 41: runs > If the above is changed to plural, this also needs to be changed to `run` Done https://review.coreboot.org/c/coreboot/+/56017/comment/ea9ada35_962a12e1 PS7, Line 45: when > nit: Capitalize `When` for consistency with the other bullet points Done https://review.coreboot.org/c/coreboot/+/56017/comment/22519020_3536ad93 PS7, Line 45: the compiler > Which one? `the compiler` sounds like there's only one compiler, which is not the case. Done https://review.coreboot.org/c/coreboot/+/56017/comment/cbfa50c2_f4e2d61f PS7, Line 49: todays > today's Done https://review.coreboot.org/c/coreboot/+/56017/comment/e5f65249_aa2199b6 PS7, Line 54: The high dword of pointers is always zero > Is this an actual requirement, or just a side effect? If it's a requirement, then please use imperat […] Done https://review.coreboot.org/c/coreboot/+/56017/comment/e45689b6_8bedf1ff PS7, Line 70: those > nit: these Done https://review.coreboot.org/c/coreboot/+/56017/comment/24155078_648649eb PS7, Line 70: had > have Done https://review.coreboot.org/c/coreboot/+/56017/comment/73fc19a8_9165b57a PS7, Line 71: those > nit: `these`, or just `the` Done https://review.coreboot.org/c/coreboot/+/56017/comment/3951f69a_2df9d6cc PS7, Line 71: Once : finished running those blobs it must switch back to long mode. > How about: […] Done https://review.coreboot.org/c/coreboot/+/56017/comment/4a7691e6_ce426afa PS7, Line 77: will be reported back > `is relayed back` or `is propagated back` Done https://review.coreboot.org/c/coreboot/+/56017/comment/20afd2d7_1d039ac4 PS7, Line 84: > drop one blank line? Done https://review.coreboot.org/c/coreboot/+/56017/comment/6519cf1b_50239555 PS7, Line 91: pagetable > page tables Done https://review.coreboot.org/c/coreboot/+/56017/comment/58c92ee8_1ecead85 PS7, Line 103: it > the CPU Done https://review.coreboot.org/c/coreboot/+/56017/comment/25f862c4_fd32c89f PS7, Line 104: those > nit: these Done https://review.coreboot.org/c/coreboot/+/56017/comment/653f5e20_1b214312 PS7, Line 109: Options > `Option` (`Option ROMs` is a compound name, the plural `s` is in `ROMs`) Done https://review.coreboot.org/c/coreboot/+/56017/comment/3dc552f2_d541c285 PS7, Line 115: Must allow only that TSEG pages can be marked executable. > How about: […] Done https://review.coreboot.org/c/coreboot/+/56017/comment/3f1177ac_d0c228b6 PS7, Line 125: Until now it could be verified by FOSS developers on various Intel platforms : and no issues have been found. > I'd prefer to avoid using the word `verify` here, as there's no way to ensure x86_64 in CAR is fully […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/56017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia5ba51be629a8c878aad64d3297176457cf8e855 Gerrit-Change-Number: 56017 Gerrit-PatchSet: 8 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 04 Dec 2021 19:39:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation: Improve x86_64
by Patrick Rudolph (Code Review) 04 Dec '21

04 Dec '21

Attention is currently required from: Patrick Rudolph, Tim Wawrzynczak, Paul Menzel. Patrick Rudolph has uploaded a new patch set (#8) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/56017 ) Change subject: Documentation: Improve x86_64 ...................................................................... Documentation: Improve x86_64 * Move to own markdown document * Better describe current implementation * Update TODOs Change-Id: Ia5ba51be629a8c878aad64d3297176457cf8e855 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M Documentation/arch/x86/index.md A Documentation/arch/x86/x86_64.md 2 files changed, 153 insertions(+), 92 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/56017/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/56017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia5ba51be629a8c878aad64d3297176457cf8e855 Gerrit-Change-Number: 56017 Gerrit-PatchSet: 8 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/arch/x86/exit_car: Fix regression on x86_64
by Patrick Rudolph (Code Review) 04 Dec '21

04 Dec '21

Attention is currently required from: Patrick Rudolph, Subrata Banik, Arthur Heymans, Angel Pons. Hello build bot (Jenkins), Subrata Banik, Arthur Heymans, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59871 to look at the new patch set (#2). Change subject: src/arch/x86/exit_car: Fix regression on x86_64 ...................................................................... src/arch/x86/exit_car: Fix regression on x86_64 The commit d023909b "treewide: Disable R_AMD64_32S relocation support" clflush the address stored in _cbmem_top_ptr, which is the same address cbmem_top() returns, instead of clflush _cbmem_top_ptr itself. Fix that by providing the correct address to clflush. Change-Id: If74591e7753cd9c3c097516430a212d416f53e4d Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/exit_car.S 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/59871/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59871 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If74591e7753cd9c3c097516430a212d416f53e4d Gerrit-Change-Number: 59871 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/arch/x86/exit_car: Add proper x86_64 code
by Patrick Rudolph (Code Review) 04 Dec '21

04 Dec '21

Attention is currently required from: Patrick Rudolph. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59873 to look at the new patch set (#2). Change subject: src/arch/x86/exit_car: Add proper x86_64 code ...................................................................... src/arch/x86/exit_car: Add proper x86_64 code Don't truncate upper bits in assembly code and thus allow loading of postcar stage above 4GiB. Tested on qemu with cbmem_top set to TOUUD. Change-Id: I42d1086f1220e44076ccf613244fc3c6d804805b Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/exit_car.S 1 file changed, 24 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/59873/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59873 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I42d1086f1220e44076ccf613244fc3c6d804805b Gerrit-Change-Number: 59873 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/arch/x86/c_start.S: Add proper x86_64 code
by Patrick Rudolph (Code Review) 04 Dec '21

04 Dec '21

Attention is currently required from: Patrick Rudolph. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59874 to look at the new patch set (#2). Change subject: src/arch/x86/c_start.S: Add proper x86_64 code ...................................................................... src/arch/x86/c_start.S: Add proper x86_64 code Don't truncate upper bits in assembly code and thus allow loading of ramstage above 4GiB. Tested on qemu with cbmem_top set to TOUUD. Change-Id: Ifc9b45f69d0b7534b2faacaad0d099cef2667478 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/c_start.S 1 file changed, 35 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/59874/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59874 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc9b45f69d0b7534b2faacaad0d099cef2667478 Gerrit-Change-Number: 59874 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/adl: Add override skip_cse_sub_part_update() for alderlake
by 9elements QA (Code Review) 04 Dec '21

04 Dec '21

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59826 ) Change subject: soc/intel/adl: Add override skip_cse_sub_part_update() for alderlake ...................................................................... Patch Set 6: Automatic boot test returned (PASS/FAIL/TOTAL): 4 / 3 / 7 FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/83436 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/83434 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/83433 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/83431 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/83430 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/83429 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/83427 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/59826 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icae21dad56ed4a1edea1f641b3d5bccc3943f831 Gerrit-Change-Number: 59826 Gerrit-PatchSet: 6 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Sat, 04 Dec 2021 16:00:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add support for CSE IOM/NPHY sub-parition update
by 9elements QA (Code Review) 04 Dec '21

04 Dec '21

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59685 ) Change subject: soc/intel/common: Add support for CSE IOM/NPHY sub-parition update ...................................................................... Patch Set 19: Automatic boot test returned (PASS/FAIL/TOTAL): 4 / 4 / 8 FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/83425 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/83423 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/83422 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/83420 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/83419 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/83418 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/83417 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/83416 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/59685 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c0cda51314c4f722f5432486a43e19b46f4b240 Gerrit-Change-Number: 59685 Gerrit-PatchSet: 19 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sat, 04 Dec 2021 14:28:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add check before sending HMRFPO_ENABLE command
by 9elements QA (Code Review) 04 Dec '21

04 Dec '21

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59698 ) Change subject: soc/intel/common: Add check before sending HMRFPO_ENABLE command ...................................................................... Patch Set 9: Automatic boot test returned (PASS/FAIL/TOTAL): 5 / 3 / 8 FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/83413 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/83411 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/83410 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/83408 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/83407 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/83406 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/83405 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/83404 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/59698 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I387ac7c7296ab06b9bb440d5d40c3286bf879d3b Gerrit-Change-Number: 59698 Gerrit-PatchSet: 9 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sat, 04 Dec 2021 12:52:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Define soc_get_pcie_rp_type
by Paul Menzel (Code Review) 04 Dec '21

04 Dec '21

Attention is currently required from: Tim Wawrzynczak, Subrata Banik, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59853 ) Change subject: soc/intel/tigerlake: Define soc_get_pcie_rp_type ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59853 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic3f7d3f2fc12ae2b53604cd8f8b694a7674c3620 Gerrit-Change-Number: 59853 Gerrit-PatchSet: 4 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 04 Dec 2021 12:05:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/hatch: Remove stryke mainboard
by Paul Menzel (Code Review) 04 Dec '21

04 Dec '21

Attention is currently required from: Shelley Chen, Patrick Georgi, Tim Wawrzynczak, Rob Barnes, Jack Rosenthal. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59875 ) Change subject: mb/google/hatch: Remove stryke mainboard ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59875 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d91fbd4ba0abe0cf599e8e75f04398ef9ff5222 Gerrit-Change-Number: 59875 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Jack Rosenthal <jrosenth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Jack Rosenthal <jrosenth(a)google.com> Gerrit-Comment-Date: Sat, 04 Dec 2021 12:04:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2021