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Change subject: [WIP] drivers/intel/fsp2_0: Add support for FSP_NON_VOLATILE_STORAGE_HOB2
......................................................................
Patch Set 18:
(2 comments)
File src/drivers/intel/fsp2_0/hand_off_block.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134932):
https://review.coreboot.org/c/coreboot/+/59638/comment/7bdac82e_c297fbde
PS18, Line 327: }
trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134932):
https://review.coreboot.org/c/coreboot/+/59638/comment/26d63952_0a771f68
PS18, Line 329:
trailing whitespace
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Change subject: [WIP] drivers/intel/fsp2_0: Add support for FSP_NON_VOLATILE_STORAGE_HOB2
......................................................................
Patch Set 17:
(2 comments)
File src/drivers/intel/fsp2_0/hand_off_block.c:
https://review.coreboot.org/c/coreboot/+/59638/comment/02ad926e_4559fc30
PS17, Line 326: }
> BTW, this won't compile right now if you enable the Kconfig, because in this path, if hob_walker. […]
Ack
https://review.coreboot.org/c/coreboot/+/59638/comment/17c9cdb2_8ee57f27
PS17, Line 316: if (CONFIG(PLATFORM_USES_FSP2_3)) {
: union {
: const struct fsp_nvs_hob2_data_region_header *hob;
: const void *hob_descr;
: } hob_walker;
: hob_walker.hob = (const struct fsp_nvs_hob2_data_region_header *)
: fsp_find_extension_hob_by_guid(fsp_nv_storage_guid_2, size);
: if (hob_walker.hob != NULL) {
: *size = hob_walker.hob->nvs_data_length;
: return hob_walker.hob_descr;
: }
: } else {
: return fsp_find_extension_hob_by_guid(fsp_nv_storage_guid, size);
: }
> I might return early just to avoid an extra indent, e.g.: […]
Hi Tim. There could be potential cases of platforms adopting newer header revisions but still using the older HOBs.To take care of this the recomendation from FSP architecture doc is to search for HOB2 and if not found search for HOB1 . I updated my code by removing the else
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Change subject: mb/acer/g43t-am3: Add documentation
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> Can this be submitted?
From my side yes, I checked this off as "ready" (in my head).
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Hello build bot (Jenkins), Julius Werner, Rob Barnes, Kyösti Mälkki, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59320
to look at the new patch set (#11).
Change subject: lib: Add a mutex
......................................................................
lib: Add a mutex
We currently have two synchronization primatives, spinlock and
thread_mutex. spinlock is meant to block multiple CPUs from entering a
critical section. thread_mutex is meant to block multiple coop-threads
from entering a critical section. It is not AP aware at all.
This CL introduces a mutex that can handle both concepts. The
implementation is using the GCC/LLVM atomic builtin functions. The
generated code uses the xchg instruction vs spinlock which uses (lock)
decb.
8: b0 01 mov $0x1,%al
a: 86 03 xchg %al,(%ebx)
c: 84 c0 test %al,%al
BUG=b:179699789
TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I41e02a54a17b1f6513b36a0274e43fc715472d78
---
A src/include/mutex.h
M src/lib/Makefile.inc
A src/lib/mutex.c
3 files changed, 99 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/59320/11
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Hello build bot (Jenkins), Julius Werner, Rob Barnes, Kyösti Mälkki, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59320
to look at the new patch set (#10).
Change subject: lib: Add a mutex
......................................................................
lib: Add a mutex
We currently have two synchronization primatives, spinlock and
thread_mutex. spinlock is meant to block multiple CPUs from entering a
critical section. thread_mutex is meant to block multiple coop-threads
from entering a critical section. It is not AP aware at all.
This CL introduces a mutex that can handle both concepts. The
implementation is using the GCC/LLVM atomic builtin functions. The
generated code uses the xchg instruction vs spinlock which uses (lock)
decb.
8: b0 01 mov $0x1,%al
a: 86 03 xchg %al,(%ebx)
c: 84 c0 test %al,%al
BUG=b:179699789
TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I41e02a54a17b1f6513b36a0274e43fc715472d78
---
A src/include/mutex.h
M src/lib/Makefile.inc
2 files changed, 40 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/59320/10
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Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59320 )
Change subject: lib: Add a mutex
......................................................................
Patch Set 10:
(1 comment)
File src/include/mutex.h:
https://review.coreboot.org/c/coreboot/+/59320/comment/39bd4506_315ad652
PS9, Line 62: assert(__atomic_load_1(&mutex->locked, __ATOMIC_RELAXED));
> I'm not sure if we actually want to inline these, since assert() takes a notable amount of instructi […]
Done
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9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54754 )
Change subject: cpu/x86/mp_init.c: Fix building with no smihandler
......................................................................
Patch Set 6:
Automatic boot test returned (PASS/FAIL/TOTAL): 4 / 3 / 7
FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500
and payload SeaBIOS : https://lava.9esec.io/r/83312
FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64
and payload SeaBIOS : https://lava.9esec.io/r/83310
FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC
and payload SeaBIOS : https://lava.9esec.io/r/83309
PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35
and payload SeaBIOS : https://lava.9esec.io/r/83307
PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64
and payload SeaBIOS : https://lava.9esec.io/r/83306
PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_
and payload SeaBIOS : https://lava.9esec.io/r/83304
PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX
and payload SeaBIOS : https://lava.9esec.io/r/83303
Please note: This test is under development and might not be accurate at all!
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Attention is currently required from: Philipp Hug, Ron Minnich.
Hello Philipp Hug, Ron Minnich,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59732
to look at the new patch set (#2).
Change subject: arch/{x86,riscv},smp: Delete spinlock.h
......................................................................
arch/{x86,riscv},smp: Delete spinlock.h
spinlock.h has been replaced with mutex.h.
BUG=b:179699789
TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I0d204ea96cc843f1f10d152559a9ee06735623ef
---
D src/arch/riscv/include/arch/smp/spinlock.h
M src/arch/riscv/smp.c
M src/arch/x86/cpu.c
D src/arch/x86/include/arch/smp/spinlock.h
D src/include/smp/spinlock.h
5 files changed, 2 insertions(+), 115 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/59732/2
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Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59550 )
Change subject: rules.h, thread.h, lib/cbfs: Add ENV_STAGE_SUPPORTS_COOP
......................................................................
Patch Set 1:
(1 comment)
File src/include/rules.h:
https://review.coreboot.org/c/coreboot/+/59550/comment/44728c39_d0634c5a
PS1, Line 306: ENV_ROMSTAGE
> I don't think it's a good idea to try to check if it was still the same device afterwards... […]
Pushed CB:59876
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Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59876 )
Change subject: lib/cbfs: Disable cbfs_preload in romstage when VBOOT_STARTS_IN_ROMSTAGE
......................................................................
lib/cbfs: Disable cbfs_preload in romstage when VBOOT_STARTS_IN_ROMSTAGE
Preloading files before vboot runs and using them after vboot has
finished will result in the wrong files getting used. Disable
cbfs_preload to avoid this behavior.
BUG=b:179699789
TEST=none
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I7698b481a73fb24eecf4c810ff8be8b6826528ca
---
M src/lib/cbfs.c
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/59876/1
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index d1930a9..2f889d9 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -328,6 +328,10 @@
if (!CONFIG(CBFS_PRELOAD))
dead_code();
+ /* We don't want to cross the vboot boundary */
+ if (ENV_ROMSTAGE && CONFIG(VBOOT_STARTS_IN_ROMSTAGE))
+ return;
+
DEBUG("%s(name='%s')\n", __func__, name);
if (_cbfs_boot_lookup(name, force_ro, &mdata, &rdev))
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