coreboot-gerrit December 2021

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Change in coreboot[master]: soc/intel/cse: config to enable oem key manifest
by Ravindra (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Ravindra N. Hello Ravindra N, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/59895 to review the following change. Change subject: soc/intel/cse: config to enable oem key manifest ...................................................................... soc/intel/cse: config to enable oem key manifest BUG:b:207820413 TEST: Boot to kernal and check for the ipu authentication is successful localhost ~ # dmesg | grep -i ipu [ 9.206568] intel-ipu6 intel-ipu: IPU in secure mode [ 9.218917] intel-ipu6 intel-ipu: IPC reset done [ 9.226160] intel-ipu6 intel-ipu: cpd file name: intel/ipu6ep_fw.bin [ 9.265134] intel-ipu6 intel-ipu: FW version: 20201224 [ 9.298977] intel-ipu6 intel-ipu: Sending BOOT_LOAD to CSE [ 9.314555] intel-ipu6 intel-ipu: Sending AUTHENTICATE_RUN to CSE [ 9.390078] intel-ipu6 intel-ipu: CSE authenticate_run done [ 9.396530] intel-ipu6 intel-ipu: IPU driver version 1.0 Cq-Depend: 3291463: config.baseboard.brya: config to support oem key manifest | https://chromium-review.googlesource.com/c/chromiumos/overlays/chromiumos-o… Signed-off-by: Ravindra N <ravindra(a)intel.corp-partner.google.com> Change-Id: I3620adb2898efc002104e0ba8b2afd219c31f230 --- M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/common/block/cse/Kconfig 2 files changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/59895/1 diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index a11352f..3ab4d9d 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -65,7 +65,7 @@ $(eval $(call cse_add_decomp_to_bp1_bp2,RBEP)) $(eval $(call cse_add_dummy_to_bp1_bp2,UFSP)) $(eval $(call cse_add_dummy_to_bp1_bp2,UFSG)) -$(eval $(call cse_add_dummy_to_bp1_bp2,OEMP)) +$(eval $(call cse_add_input_to_bp1_bp2,OEMP)) $(eval $(call cse_add_input_to_bp1_bp2,PMCP)) $(eval $(call cse_add_decomp,bp1,MFTP)) $(eval $(call cse_add_decomp,bp2,FTPR)) diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index 420b511..dfb0c01 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -180,4 +180,8 @@ help This config indicates the BPDT version used by CSE for a given SoC. +config CSE_OEMP_FILE + string "Name OEM KM file" + default "oem_km.bin" + endif -- To view, visit https://review.coreboot.org/c/coreboot/+/59895 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3620adb2898efc002104e0ba8b2afd219c31f230 Gerrit-Change-Number: 59895 Gerrit-PatchSet: 1 Gerrit-Owner: Ravindra <ravindra(a)intel.com> Gerrit-Reviewer: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-Attention: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake:[TEST_ONLY][NOT_FOR_MERGE] Run Mem Controller @ l...
by Sridhar Siricilla (Code Review) 06 Dec '21

06 Dec '21

Sridhar Siricilla has removed Paul Menzel from this change. ( https://review.coreboot.org/c/coreboot/+/59862 ) Change subject: soc/intel/alderlake:[TEST_ONLY][NOT_FOR_MERGE] Run Mem Controller @ lowest frequency ...................................................................... Removed cc Paul Menzel. -- To view, visit https://review.coreboot.org/c/coreboot/+/59862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbc591aff89e166bf90c0cec8bd308f8ea5a47dd Gerrit-Change-Number: 59862 Gerrit-PatchSet: 4 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: soc/intel/alderlake:[TEST_ONLY][NOT_FOR_MERGE] Run Mem Controller @ l...
by Sridhar Siricilla (Code Review) 06 Dec '21

06 Dec '21

Sridhar Siricilla has removed Patrick Rudolph from this change. ( https://review.coreboot.org/c/coreboot/+/59862 ) Change subject: soc/intel/alderlake:[TEST_ONLY][NOT_FOR_MERGE] Run Mem Controller @ lowest frequency ...................................................................... Removed reviewer Patrick Rudolph. -- To view, visit https://review.coreboot.org/c/coreboot/+/59862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbc591aff89e166bf90c0cec8bd308f8ea5a47dd Gerrit-Change-Number: 59862 Gerrit-PatchSet: 4 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: soc/intel/alderlake:[TEST_ONLY][NOT_FOR_MERGE] Run Mem Controller @ l...
by Sridhar Siricilla (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Patrick Rudolph. Sridhar Siricilla has removed Tim Wawrzynczak from this change. ( https://review.coreboot.org/c/coreboot/+/59862 ) Change subject: soc/intel/alderlake:[TEST_ONLY][NOT_FOR_MERGE] Run Mem Controller @ lowest frequency ...................................................................... Removed reviewer Tim Wawrzynczak. -- To view, visit https://review.coreboot.org/c/coreboot/+/59862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbc591aff89e166bf90c0cec8bd308f8ea5a47dd Gerrit-Change-Number: 59862 Gerrit-PatchSet: 4 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: mb/google/brya/var/gimble: Configure Acoustic noise mitigation
by Anfernee Chen (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: YH Lin, Tim Wawrzynczak, Paul Menzel, Mark Hsieh, Zhuohao Lee, Felix Held. Anfernee Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59535 ) Change subject: mb/google/brya/var/gimble: Configure Acoustic noise mitigation ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59535/comment/09af0e64_f4690e75 PS1, Line 14: without error. > I assume this also reduces audible noise? 😊 Hi Tim, Yes, from EE's feedback, it can reduce audible noise. Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/59535 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2be3d30403284b98276c837adefd91aa62c971e4 Gerrit-Change-Number: 59535 Gerrit-PatchSet: 1 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 06 Dec 2021 02:40:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: lib: Fix log2_ceil() for 0xffffffff
by Yu-Ping Wu (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Paul Menzel, Julius Werner. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59834 ) Change subject: lib: Fix log2_ceil() for 0xffffffff ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59834/comment/254be8f6_8cf4c5cf PS2, Line 7: lib: Fix edge case of log2_ceil() > Be specific: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59834 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If868f793b909a6ad7fc48a7affac15e2c714fa2e Gerrit-Change-Number: 59834 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 06 Dec 2021 02:24:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: lib: Fix log2_ceil() for 0xffffffff
by Yu-Ping Wu (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Julius Werner, Yu-Ping Wu. Hello build bot (Jenkins), Jakub Czapiga, Paul Menzel, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59834 to look at the new patch set (#3). Change subject: lib: Fix log2_ceil() for 0xffffffff ...................................................................... lib: Fix log2_ceil() for 0xffffffff Current log2_ceil(x) is defined as log2(x * 2 - 1). When x is larger than (1 << 31), (x * 2 - 1) won't fit in u32, leading to incorrect result. Therefore, correct it as (log2(x - 1) + 1). Also add unit tests for inline functions in lib.h. BUG=none TEST=make tests/lib/lib-test BRANCH=none Change-Id: If868f793b909a6ad7fc48a7affac15e2c714fa2e Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/include/lib.h M tests/lib/Makefile.inc A tests/lib/lib-test.c 3 files changed, 65 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/59834/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59834 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If868f793b909a6ad7fc48a7affac15e2c714fa2e Gerrit-Change-Number: 59834 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/pch: Fix return value documentation for CHIPSET_LOCK...
by Jingle Hsu (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Marc Jones, Jonathan Zhang, Johnny Lin, Paul Menzel, Subrata Banik, Patrick Rudolph. Jingle Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59857 ) Change subject: soc/intel/common/pch: Fix return value documentation for CHIPSET_LOCKDOWN ...................................................................... Patch Set 4: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59857/comment/fd38440d_355a5818 PS3, Line 2: JingleHsuWiwynn > Jingle Hsu […] Done https://review.coreboot.org/c/coreboot/+/59857/comment/56db954a_e1114543 PS3, Line 7: Fix the comment typos for CHIPSET_LOCKDOWN > Maybe: […] Done https://review.coreboot.org/c/coreboot/+/59857/comment/1ab92b6c_093c48a4 PS3, Line 12: JingleHsuWiwynn > Ditto. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I50dbc00806fefda8f4dac8bfa21dc714a9504566 Gerrit-Change-Number: 59857 Gerrit-PatchSet: 4 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 06 Dec 2021 01:56:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/pch: Fix return value documentation for CHIPSET_LOCK...
by Jingle Hsu (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Marc Jones, Jonathan Zhang, Johnny Lin, Jingle Hsu, Subrata Banik, Patrick Rudolph. Hello build bot (Jenkins), Marc Jones, Jonathan Zhang, Johnny Lin, Paul Menzel, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59857 to look at the new patch set (#4). Change subject: soc/intel/common/pch: Fix return value documentation for CHIPSET_LOCKDOWN ...................................................................... soc/intel/common/pch: Fix return value documentation for CHIPSET_LOCKDOWN Fixed according to the declaration in soc/intel/common/block/include/intelblocks/cfg.h. Change-Id: I50dbc00806fefda8f4dac8bfa21dc714a9504566 Signed-off-by: Jingle Hsu <jingle_hsu(a)wiwynn.com> --- M src/soc/intel/common/pch/include/intelpch/lockdown.h M src/soc/intel/common/pch/lockdown/lockdown.c 2 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/59857/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I50dbc00806fefda8f4dac8bfa21dc714a9504566 Gerrit-Change-Number: 59857 Gerrit-PatchSet: 4 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/arch/x86/c_start.S: Add proper x86_64 code
by Arthur Heymans (Code Review) 05 Dec '21

05 Dec '21

Attention is currently required from: Felix Singer, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59874 ) Change subject: src/arch/x86/c_start.S: Add proper x86_64 code ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59874 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc9b45f69d0b7534b2faacaad0d099cef2667478 Gerrit-Change-Number: 59874 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Sun, 05 Dec 2021 19:44:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2021