coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/mediatek/mt8195: complete devapc settings
by Rex-BC Chen (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Hung-Te Lin. Rex-BC Chen has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/59746 ) Change subject: soc/mediatek/mt8195: complete devapc settings ...................................................................... Removed Code-Review-1 by Rex-BC Chen <rex-bc.chen(a)mediatek.com> -- To view, visit https://review.coreboot.org/c/coreboot/+/59746 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1846d56d2dc362de64b28e0ed9a0681f186af7ee Gerrit-Change-Number: 59746 Gerrit-PatchSet: 7 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: deleteVote

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Change in coreboot[master]: soc/mediatek/mt8195: complete devapc settings
by Rex-BC Chen (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Hung-Te Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59746 ) Change subject: soc/mediatek/mt8195: complete devapc settings ...................................................................... Patch Set 7: (1 comment) Patchset: PS5: > wait QA fully test QA sanity test pass. -- To view, visit https://review.coreboot.org/c/coreboot/+/59746 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1846d56d2dc362de64b28e0ed9a0681f186af7ee Gerrit-Change-Number: 59746 Gerrit-PatchSet: 7 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Mon, 06 Dec 2021 07:23:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: complete devapc settings
by Rex-BC Chen (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Hung-Te Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59746 ) Change subject: soc/mediatek/mt8195: complete devapc settings ...................................................................... Patch Set 7: Code-Review-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59746 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1846d56d2dc362de64b28e0ed9a0681f186af7ee Gerrit-Change-Number: 59746 Gerrit-PatchSet: 7 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Mon, 06 Dec 2021 07:23:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: complete devapc settings
by Rex-BC Chen (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59746 to look at the new patch set (#7). Change subject: soc/mediatek/mt8195: complete devapc settings ...................................................................... soc/mediatek/mt8195: complete devapc settings In previous patch (CB:56764), only basic settings were added. Now complete devapc settings on MT8195. 1. Update permission setting 2. Updtate master domain setting: - domain 1: PCIE0, PCIE1 - domain 2: SPM, SSPM, CPU_EB 3. Set domain remap - MMSYS (4-bit to 2-bit) - TINYSYS (4-bit to 3-bit) - TINYSYS (3-bit to 4-bit) - TINYSYS to EMI (3-bit to 4-bit) - INFRA2 (3-bit to 4-bit) 4. Set SCP domain and ADSP domain - domain 3: SCP - domain 4: ADSP BUG=b:204347737 TEST=sanity test pass Change-Id: I1846d56d2dc362de64b28e0ed9a0681f186af7ee Signed-off-by: Nina Wu <nina-cm.wu(a)mediatek.com> --- M src/soc/mediatek/mt8195/devapc.c M src/soc/mediatek/mt8195/include/soc/addressmap.h M src/soc/mediatek/mt8195/include/soc/devapc.h 3 files changed, 274 insertions(+), 142 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/59746/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/59746 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1846d56d2dc362de64b28e0ed9a0681f186af7ee Gerrit-Change-Number: 59746 Gerrit-PatchSet: 7 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/cse: config to enable oem key manifest
by Ravindra N (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Tim Wawrzynczak, Ravindra, Sridhar Siricilla, Krishna P Bhat D, Patrick Rudolph. Ravindra N has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59895 ) Change subject: soc/intel/cse: config to enable oem key manifest ...................................................................... Patch Set 3: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59895/comment/6cbf1f38_9d42ac0e PS1, Line 9: BUG:b:207820413 > nit: BUG=b:207820413 Done https://review.coreboot.org/c/coreboot/+/59895/comment/a3125ed6_b7bce6aa PS1, Line 10: TEST: Boot to kernal and check for the ipu authentication > nit: kernel Done https://review.coreboot.org/c/coreboot/+/59895/comment/c448ea4b_15a02b7f PS1, Line 22: Cq-Depend: 3291463: config.baseboard.brya: config to support oem key manifest > nit: Cq-Depend: chromium:3291463 Done Patchset: PS3: Please review the changes -- To view, visit https://review.coreboot.org/c/coreboot/+/59895 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3620adb2898efc002104e0ba8b2afd219c31f230 Gerrit-Change-Number: 59895 Gerrit-PatchSet: 3 Gerrit-Owner: Ravindra <ravindra(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Ravindra <ravindra(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 06 Dec 2021 05:10:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cse: config to enable oem key manifest
by Ravindra N (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Ravindra N has uploaded a new patch set (#3) to the change originally created by Ravindra. ( https://review.coreboot.org/c/coreboot/+/59895 ) Change subject: soc/intel/cse: config to enable oem key manifest ...................................................................... soc/intel/cse: config to enable oem key manifest CB change will enable the CSE region sub-partition OEMP, where the OEMP binary will be stitched. BUG=b:207820413 TEST: Boot to kernel and check for the ipu authentication is successful localhost ~ # dmesg | grep -i ipu [ 9.206568] intel-ipu6 intel-ipu: IPU in secure mode [ 9.218917] intel-ipu6 intel-ipu: IPC reset done [ 9.226160] intel-ipu6 intel-ipu: cpd file name: intel/ipu6ep_fw.bin [ 9.265134] intel-ipu6 intel-ipu: FW version: 20201224 [ 9.298977] intel-ipu6 intel-ipu: Sending BOOT_LOAD to CSE [ 9.314555] intel-ipu6 intel-ipu: Sending AUTHENTICATE_RUN to CSE [ 9.390078] intel-ipu6 intel-ipu: CSE authenticate_run done [ 9.396530] intel-ipu6 intel-ipu: IPU driver version 1.0 Cq-Depend: chromium:3291463 config.baseboard.brya: config to support oem key manifest | https://chromium-review.googlesource.com/c/chromiumos/overlays/chromiumos-o… Signed-off-by: Ravindra N <ravindra(a)intel.corp-partner.google.com> Change-Id: I3620adb2898efc002104e0ba8b2afd219c31f230 --- M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/common/block/cse/Kconfig 2 files changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/59895/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59895 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3620adb2898efc002104e0ba8b2afd219c31f230 Gerrit-Change-Number: 59895 Gerrit-PatchSet: 3 Gerrit-Owner: Ravindra <ravindra(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/cse: config to enable oem key manifest
by Ravindra (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Tim Wawrzynczak, Ravindra, Sridhar Siricilla, Patrick Rudolph. Hello build bot (Jenkins), Tim Wawrzynczak, Sridhar Siricilla, Krishna P Bhat D, Patrick Rudolph, Ravindra N, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59895 to look at the new patch set (#2). Change subject: soc/intel/cse: config to enable oem key manifest ...................................................................... soc/intel/cse: config to enable oem key manifest CB change will enable the CSE region sub-partition OEMP, where the OEMP binary will be stitched. BUG= b:207820413 TEST: Boot to kernel and check for the ipu authentication is successful localhost ~ # dmesg | grep -i ipu [ 9.206568] intel-ipu6 intel-ipu: IPU in secure mode [ 9.218917] intel-ipu6 intel-ipu: IPC reset done [ 9.226160] intel-ipu6 intel-ipu: cpd file name: intel/ipu6ep_fw.bin [ 9.265134] intel-ipu6 intel-ipu: FW version: 20201224 [ 9.298977] intel-ipu6 intel-ipu: Sending BOOT_LOAD to CSE [ 9.314555] intel-ipu6 intel-ipu: Sending AUTHENTICATE_RUN to CSE [ 9.390078] intel-ipu6 intel-ipu: CSE authenticate_run done [ 9.396530] intel-ipu6 intel-ipu: IPU driver version 1.0 Cq-Depend: chromium:3291463 config.baseboard.brya: config to support oem key manifest | https://chromium-review.googlesource.com/c/chromiumos/overlays/chromiumos-o… Signed-off-by: Ravindra N <ravindra(a)intel.corp-partner.google.com> Change-Id: I3620adb2898efc002104e0ba8b2afd219c31f230 --- M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/common/block/cse/Kconfig 2 files changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/59895/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59895 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3620adb2898efc002104e0ba8b2afd219c31f230 Gerrit-Change-Number: 59895 Gerrit-PatchSet: 2 Gerrit-Owner: Ravindra <ravindra(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Ravindra <ravindra(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Add ADL-P 6+8+2 (28W) VR config
by Curtis Chen (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Tim Wawrzynczak, Paul Menzel, Patrick Rudolph. Curtis Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59736 ) Change subject: soc/intel/alderlake: Add ADL-P 6+8+2 (28W) VR config ...................................................................... Patch Set 5: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59736/comment/140f5607_6795df60 PS2, Line 7: 682 > nit: `6+8+2` Done https://review.coreboot.org/c/coreboot/+/59736/comment/a8f518e0_f3f8fcb9 PS2, Line 9: 682 > nit: `6+8+2` Done https://review.coreboot.org/c/coreboot/+/59736/comment/781dc1e1_df8c1625 PS2, Line 10: 682 > nit: `6+8+2` Done File src/soc/intel/alderlake/vr_config.c: https://review.coreboot.org/c/coreboot/+/59736/comment/d44b53fd_6caebfcd PS2, Line 53: 682 > nit: `6+8+2` […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie8dbd95b2d8e49b5898b2a97aff72e0e64868c8b Gerrit-Change-Number: 59736 Gerrit-PatchSet: 5 Gerrit-Owner: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 06 Dec 2021 05:00:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add ADL-P 6+8+2 (28W) VR config
by Curtis Chen (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Paul Menzel, Patrick Rudolph. Hello build bot (Jenkins), Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59736 to look at the new patch set (#4). Change subject: soc/intel/alderlake: Add ADL-P 6+8+2 (28W) VR config ...................................................................... soc/intel/alderlake: Add ADL-P 6+8+2 (28W) VR config We only have ADL-P 6+8+2 (45W) VR configuration now. Based on the power map, fill in correct ADL-P 6+8+2 (28W) VR configuration. BUG=b:202486131 TEST=Build and check fsp log to confirm the settings are set properly. Signed-off-by: Curtis Chen <curtis.chen(a)intel.com> Change-Id: Ie8dbd95b2d8e49b5898b2a97aff72e0e64868c8b --- M src/soc/intel/alderlake/vr_config.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/59736/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie8dbd95b2d8e49b5898b2a97aff72e0e64868c8b Gerrit-Change-Number: 59736 Gerrit-PatchSet: 4 Gerrit-Owner: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Add ADL-P 6+8+2 (28W) VR config
by Curtis Chen (Code Review) 06 Dec '21

06 Dec '21

Attention is currently required from: Paul Menzel, Curtis Chen, Patrick Rudolph. Hello build bot (Jenkins), Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59736 to look at the new patch set (#3). Change subject: soc/intel/alderlake: Add ADL-P 6+8+2 (28W) VR config ...................................................................... soc/intel/alderlake: Add ADL-P 6+8+2 (28W) VR config We only have ADL-P 682 (45W) VR configuration now. Based on the power map, fill in correct ADL-P 6+8+2 (28W) VR configuration. BUG=b:202486131 TEST=Build and check fsp log to confirm the settings are set properly. Signed-off-by: Curtis Chen <curtis.chen(a)intel.com> Change-Id: Ie8dbd95b2d8e49b5898b2a97aff72e0e64868c8b --- M src/soc/intel/alderlake/vr_config.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/59736/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie8dbd95b2d8e49b5898b2a97aff72e0e64868c8b Gerrit-Change-Number: 59736 Gerrit-PatchSet: 3 Gerrit-Owner: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit December 2021