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Change subject: payloads/Makefile.inc: Add warning for image built with no payload
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
File payloads/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/60025/comment/e34310ec_945ebeb1
PS1, Line 60: printf "You can use cbfstool to add a payload to the image.\n\n"
Nit, the text block looks very unbalanced. Moving "board's" to the next
line would already help. But overall this also seems to suffer from
line-break-after-period syndrom (BAPS).
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Change subject: [TESTME] nb/intel/ironlake: Fix some quickpath init magic
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60216/comment/050ea45a_18ce1b7e
PS1, Line 17:
> Maybe mention that the MSR is defined that way also in the Linux kernel sources? […]
I found it in EDK2 sources
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Change subject: drivers/intel/gma: Remove _BCL from acpigen
......................................................................
Patch Set 4:
(1 comment)
This change is ready for review.
Commit Message:
https://review.coreboot.org/c/coreboot/+/59258/comment/6afd6343_1956970a
PS3, Line 16: ```
: No Local Variables are initialized for Method [_BCL]
: No Arguments are initialized for method [_BCL]
: ```
> Just indent with four spaces, and remove the ```.
Done
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Change subject: [TESTME] nb/intel/ironlake: Fix some quickpath init magic
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60216/comment/1a4a4313_4a8cbc84
PS1, Line 17:
Maybe mention that the MSR is defined that way also in the Linux kernel sources?
drivers/platform/x86/intel_ips.c:#define TURBO_POWER_CURRENT_LIMIT 0x1ac
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Change subject: [TESTME] nb/intel/ironlake: Fix some quickpath init magic
......................................................................
Patch Set 1:
(1 comment)
File src/northbridge/intel/ironlake/raminit.c:
https://review.coreboot.org/c/coreboot/+/60216/comment/0d40e467_86acea72
PS1, Line 3396: rdmsr(0x1ac); // !!!!
> Nothing. It's just that this MSR is now read in quickpath. […]
Hmmm, apparently this MSR is also read here for something else.
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Change subject: [TESTME] nb/intel/ironlake: Fix some quickpath init magic
......................................................................
Patch Set 1:
(1 comment)
File src/northbridge/intel/ironlake/raminit.c:
https://review.coreboot.org/c/coreboot/+/60216/comment/3591b58b_467561f0
PS1, Line 3396: rdmsr(0x1ac); // !!!!
> What happens on the Apple iMac, if this stays?
Nothing. It's just that this MSR is now read in quickpath.c (I added a define for it) and its value is used in there, so this is superfluous.
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Change subject: [TESTME] nb/intel/ironlake: Fix some quickpath init magic
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
File src/northbridge/intel/ironlake/raminit.c:
https://review.coreboot.org/c/coreboot/+/60216/comment/73b53041_3d89a9cf
PS1, Line 3396: rdmsr(0x1ac); // !!!!
What happens on the Apple iMac, if this stays?
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Change subject: util/inteltool: Add more Westmere/Ironlake device IDs
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Patch Set 1: Code-Review+1
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Change subject: soc/amd/cezanne: Correct S0i3 verstage softfuse bit
......................................................................
Patch Set 1: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60214/comment/fcf80dba_eb7eae42
PS1, Line 9: PSP_S0I3_RESUME_VERSTAGE softfuse bit is 58, not 40.
Where is that documented?
https://review.coreboot.org/c/coreboot/+/60214/comment/98165415_55bb8395
PS1, Line 14: latest PSP.
Should fit in one line.
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