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Kyösti Mälkki has uploaded a new patch set (#24) to the change originally created by Dmitry Ponamorev. ( https://review.coreboot.org/c/coreboot/+/57194 )
Change subject: mb/teleplatforms/D4E4S16P8: Add CRB using intel/denverton_ns
......................................................................
mb/teleplatforms/D4E4S16P8: Add CRB using intel/denverton_ns
This adds Teleplatforms reference design board
- Intel Atom C3758 SoC, passive heatsink
- DDR4 ECC, 4x UDIMM, max 256 GiB, or
DDR4 non-ECC, 2x UDIMM, max 128 GiB (hw rev 1.0 limitation)
- 2x 10 GbE (SFP+), Intel X553
- 2x 1 GbE (RJ-45), Intel X553
- 2x M.2 SATA
- 1x regular SATA connector
- 4x SFF-8683, maximum 16 SATA drives
- PCIe Gen3 x8 slot
- 2x USB3.1, 2x USB2.0
- HD15, analog VGA on AST2510
- serial console, 7-seg POST display
- 128MBit SPI flash with dediprog header
- 4-pin fan connector w/PWM
- ITX form factor, ATX 24-pin power
These sources are to compile the coreboot firmware image for the
teleplatforms D4E4S16P8 motherboard.
Change-Id: If654fc7a391643b50f2e52755fd7c11a37bfd188
Signed-off-by: Dmitry Ponamorev <dponamorev(a)gmail.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
A src/mainboard/teleplatforms/D4E4S16P8/Kconfig
A src/mainboard/teleplatforms/D4E4S16P8/Kconfig.name
A src/mainboard/teleplatforms/D4E4S16P8/Makefile.inc
A src/mainboard/teleplatforms/D4E4S16P8/acpi/mainboard.asl
A src/mainboard/teleplatforms/D4E4S16P8/acpi/mainboard_pci_irqs.asl
A src/mainboard/teleplatforms/D4E4S16P8/acpi/platform.asl
A src/mainboard/teleplatforms/D4E4S16P8/acpi_tables.c
A src/mainboard/teleplatforms/D4E4S16P8/board_info.txt
A src/mainboard/teleplatforms/D4E4S16P8/devicetree.cb
A src/mainboard/teleplatforms/D4E4S16P8/dsdt.asl
A src/mainboard/teleplatforms/D4E4S16P8/hsio.c
A src/mainboard/teleplatforms/D4E4S16P8/ramstage.c
A src/mainboard/teleplatforms/D4E4S16P8/romstage.c
A src/mainboard/teleplatforms/Kconfig
A src/mainboard/teleplatforms/Kconfig.name
15 files changed, 1,667 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/57194/24
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Change subject: mb/starlabs/labtop: Rename some files
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/starlabs/labtop: Add enum for `power_profile`
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
File src/mainboard/starlabs/labtop/include/variants.h:
https://review.coreboot.org/c/coreboot/+/60212/comment/e6306954_fe6e7c08
PS1, Line 11: PP_PERFORMANCE = 2,
> If I do this, then GCC will complain that `NUM_POWER_PROFILES` is not handled in the switch statemen […]
oh. that's a good point to keep the current implementation then
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Change subject: mb/starlabs/labtop: Update Vbt
......................................................................
Set Ready For Review
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Change subject: mainboard: Fix comment about early GPIOs
......................................................................
Patch Set 1: Code-Review+1
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Change subject: mb/starlabs/labtop: Rename some files
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Change subject: mb/starlabs/labtop: Add enum for `power_profile`
......................................................................
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(1 comment)
Patchset:
PS1:
Nice! Tested and works perfectly, thanks 😊
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Hello build bot (Jenkins), Raul Rangel, Jonathan Zhang, Arthur Heymans, Andrey Petrov, Patrick Rudolph, Jason Glenesk, Anjaneya "Reddy" Chagam, Marshall Dawson, Johnny Lin, Christian Walter, Tim Wawrzynczak, Felix Held, Tim Chu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58387
to look at the new patch set (#4).
Change subject: [WIP] cpu/x86/lapic: Move LAPIC configuration to MP init
......................................................................
[WIP] cpu/x86/lapic: Move LAPIC configuration to MP init
Implementation for setup_lapic() did two things -- call
enable_lapic() and virtual_wire_mode_init().
In PARALLEL_MP case enable_lapic() was redundant as it
was already executed prior to initialize_cpu() call.
For the !PARALLEL_MP case enable_lapic() is added to
AP CPUs.
Change-Id: I5caf94315776a499e9cf8f007251b61f51292dc5
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/cpu/amd/agesa/family14/model_14_init.c
M src/cpu/amd/agesa/family15tn/model_15_init.c
M src/cpu/amd/agesa/family16kb/model_16_init.c
M src/cpu/amd/pi/00730F01/model_16_init.c
M src/cpu/intel/common/common_init.c
M src/cpu/intel/haswell/haswell_init.c
M src/cpu/intel/model_1067x/model_1067x_init.c
M src/cpu/intel/model_106cx/model_106cx_init.c
M src/cpu/intel/model_2065x/model_2065x_init.c
M src/cpu/intel/model_206ax/model_206ax_init.c
M src/cpu/intel/model_65x/model_65x_init.c
M src/cpu/intel/model_67x/model_67x_init.c
M src/cpu/intel/model_68x/model_68x_init.c
M src/cpu/intel/model_6bx/model_6bx_init.c
M src/cpu/intel/model_6ex/model_6ex_init.c
M src/cpu/intel/model_6fx/model_6fx_init.c
M src/cpu/intel/model_6xx/model_6xx_init.c
M src/cpu/intel/model_f2x/model_f2x_init.c
M src/cpu/intel/model_f3x/model_f3x_init.c
M src/cpu/intel/model_f4x/model_f4x_init.c
M src/cpu/qemu-x86/qemu.c
M src/cpu/x86/lapic/lapic.c
M src/cpu/x86/lapic/lapic_cpu_init.c
M src/cpu/x86/mp_init.c
M src/include/cpu/x86/lapic.h
M src/soc/amd/cezanne/cpu.c
M src/soc/amd/picasso/cpu.c
M src/soc/amd/stoneyridge/cpu.c
M src/soc/intel/alderlake/cpu.c
M src/soc/intel/apollolake/cpu.c
M src/soc/intel/baytrail/cpu.c
M src/soc/intel/braswell/cpu.c
M src/soc/intel/cannonlake/cpu.c
M src/soc/intel/denverton_ns/cpu.c
M src/soc/intel/elkhartlake/cpu.c
M src/soc/intel/icelake/cpu.c
M src/soc/intel/jasperlake/cpu.c
M src/soc/intel/skylake/cpu.c
M src/soc/intel/tigerlake/cpu.c
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/intel/xeon_sp/cpx/cpu.c
41 files changed, 12 insertions(+), 141 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/58387/4
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