coreboot-gerrit December 2021

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Change in coreboot[master]: crossgcc/Makefile: Remove obsolete target build_make
by Felix Singer (Code Review) 29 Dec '21

29 Dec '21

Attention is currently required from: Paul Menzel, HAOUAS Elyes. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59397 ) Change subject: crossgcc/Makefile: Remove obsolete target build_make ...................................................................... Patch Set 6: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59397/comment/b533d7f5_3ec53fa4 PS6, Line 9: "Make" gnumake -- To view, visit https://review.coreboot.org/c/coreboot/+/59397 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f159fc912d09ebde6ac7ba5be83933aa251f1d5 Gerrit-Change-Number: 59397 Gerrit-PatchSet: 6 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Wed, 29 Dec 2021 09:53:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: src/lib/cbfs.c: Prepare for gcc-12
by HAOUAS Elyes (Code Review) 29 Dec '21

29 Dec '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60448 ) Change subject: src/lib/cbfs.c: Prepare for gcc-12 ...................................................................... src/lib/cbfs.c: Prepare for gcc-12 GCC-12 warns about comparisons between two operands of array type: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97573 it issue the following error: src/lib/cbfs.c:31:32: error: comparison between two arrays [-Werror=array-compare] 31 | if (_preram_cbfs_cache != _postram_cbfs_cache) | ^~ src/lib/cbfs.c:31:32: note: use '&_preram_cbfs_cache[0] != &_postram_cbfs_cache[0]' to compare the addresses Change-Id: I8dab1c69abf236e6ae78ce0fd59aa3281f5ee771 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/lib/cbfs.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/60448/1 diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 5bbbe6a..efe3ce4 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -28,7 +28,7 @@ static void switch_to_postram_cache(int unused) { - if (_preram_cbfs_cache != _postram_cbfs_cache) + if (&_preram_cbfs_cache[0] != &_postram_cbfs_cache[0]) mem_pool_init(&cbfs_cache, _postram_cbfs_cache, REGION_SIZE(postram_cbfs_cache), CONFIG_CBFS_CACHE_ALIGN); } -- To view, visit https://review.coreboot.org/c/coreboot/+/60448 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8dab1c69abf236e6ae78ce0fd59aa3281f5ee771 Gerrit-Change-Number: 60448 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: IASL: Ignore IASL's "Missing dependency" warning
by HAOUAS Elyes (Code Review) 29 Dec '21

29 Dec '21

Attention is currently required from: Michał Żygowski, Frans Hendriks, Tristan Corrick, Tim Wawrzynczak, Paul Menzel, Nick Vaccaro, Angel Pons, Piotr Król, Wim Vervoorn. Hello build bot (Jenkins), Michał Żygowski, Martin Roth - Personal, Frans Hendriks, Tristan Corrick, Tim Wawrzynczak, Paul Menzel, Nick Vaccaro, Angel Pons, Wim Vervoorn, Piotr Król, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59880 to look at the new patch set (#6). Change subject: IASL: Ignore IASL's "Missing dependency" warning ...................................................................... IASL: Ignore IASL's "Missing dependency" warning IASL compiler check for usage of _CRS, _DIS, _PRS, and _SRS objects: 1) If _PRS is present, must have _CRS and _SRS 2) If _SRS is present, must have _PRS (_PRS requires _CRS and _SRS) 3) If _DIS is present, must have _SRS (_SRS requires _PRS, _PRS requires _CRS and _SRS) 4) If _SRS is present, probably should have a _DIS (Remark only) IASL will issue a warning for each missing dependency. Ignore this warnings for existing ASL code and issue a message for all ignored IASL's warnings when the build is complete. Change-Id: I28b437194f08232727623009372327fec15215dd Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M Makefile.inc 1 file changed, 13 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/59880/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/59880 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28b437194f08232727623009372327fec15215dd Gerrit-Change-Number: 59880 Gerrit-PatchSet: 6 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth - Personal <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Add option to make MRC log silent
by EricR Lai (Code Review) 29 Dec '21

29 Dec '21

Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Andrey Petrov, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60441 ) Change subject: soc/intel/alderlake: Add option to make MRC log silent ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 Gerrit-Change-Number: 60441 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 29 Dec 2021 09:31:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: initialize krabby display
by Rex-BC Chen (Code Review) 29 Dec '21

29 Dec '21

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60447 ) Change subject: mb/google/corsola: initialize krabby display ...................................................................... mb/google/corsola: initialize krabby display PS8640 is used on Krabby board as the eDP bridge IC. Enable PS8640 and configure display in mainboard_init() to support display in firmware screen. BUG=b:210806060 TEST=saw firmware display on eDP panel of krabby and kingler. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I314d5407c40429bb7bc50f36fece58e396b27548 --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/display.c M src/mainboard/google/corsola/display.h 3 files changed, 93 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/60447/1 diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig index 702c3fc..b7ac1c7 100644 --- a/src/mainboard/google/corsola/Kconfig +++ b/src/mainboard/google/corsola/Kconfig @@ -38,6 +38,7 @@ select MAINBOARD_HAS_NATIVE_VGA_INIT select HAVE_LINEAR_FRAMEBUFFER select DRIVER_ANALOGIX_ANX7625 + select DRIVER_PARADE_PS8640 config MAINBOARD_DIR string diff --git a/src/mainboard/google/corsola/display.c b/src/mainboard/google/corsola/display.c index 6e4cbe5..056f2ea 100644 --- a/src/mainboard/google/corsola/display.c +++ b/src/mainboard/google/corsola/display.c @@ -3,37 +3,54 @@ #include <console/console.h> #include <delay.h> #include <drivers/analogix/anx7625/anx7625.h> -#include <edid.h> +#include <drivers/parade/ps8640/ps8640.h> #include <gpio.h> #include <soc/ddp.h> #include <soc/dsi.h> #include <soc/gpio_common.h> +#include <soc/regulator.h> #include <soc/i2c.h> #include <soc/mtcmos.h> #include "display.h" #include "gpio.h" -/* Set up backlight control pins as output pin and power-off by default */ -static void configure_backlight_and_bridge(void) +/* Bridge functions */ +static void bridge_ps8640_power_on(void) { - /* Disable backlight before turning on bridge */ - gpio_output(GPIO_AP_EDP_BKLTEN, 0); - gpio_output(GPIO_BL_PWM_1V8, 0); - gpio_output(GPIO_EN_PP3300_DISP_X, 1); + /* Set VRF12 to 1.2V and VCN33 to 3.3V */ + mainboard_set_regulator_vol(MTK_REGULATOR_VRF12, 1200000); + mainboard_set_regulator_vol(MTK_REGULATOR_VCN33, 3300000); + udelay(200); /* Turn on bridge */ - gpio_output(GPIO_EDPBRDG_RST_L, 0); - gpio_output(GPIO_EN_PP1000_EDPBRDG, 1); - gpio_output(GPIO_EN_PP1800_EDPBRDG, 1); - gpio_output(GPIO_EN_PP3300_EDPBRDG, 1); - mdelay(14); gpio_output(GPIO_EDPBRDG_PWREN, 1); - mdelay(10); + gpio_output(GPIO_EDPBRDG_RST_L, 0); + mdelay(2); gpio_output(GPIO_EDPBRDG_RST_L, 1); } -static int anx7625_setup(u8 i2c_bus, struct edid *edid) +static int bridge_ps8640_get_edid(u8 i2c_bus, struct edid *edid) +{ + const u8 chip = 0x8; + + if (ps8640_init(i2c_bus, chip) < 0) { + printk(BIOS_ERR, "%s: Can't init PS8640 bridge\n", __func__); + return -1; + } + if (ps8640_get_edid(i2c_bus, chip, edid) < 0) { + printk(BIOS_ERR, "%s: Can't get panel's edid\n", __func__); + return -1; + } + return 0; +} + +static int bridge_anx7625_post_power_on(u8 i2c_bus, struct edid *edid) +{ + return anx7625_dp_start(i2c_bus, edid); +} + +static int bridge_anx7625_get_edid(u8 i2c_bus, struct edid *edid) { if (anx7625_init(i2c_bus) < 0) { printk(BIOS_ERR, "%s: Can't init ANX7625 bridge\n", __func__); @@ -46,37 +63,69 @@ return 0; } -static int bridge_setup(u8 i2c_bus, struct edid *edid) +static void bridge_anx7625_power_on(void) { - if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON)) - return anx7625_setup(i2c_bus, edid); - else - printk(BIOS_ERR, "%s: There is no bridge IC supported\n", __func__); - - return -1; + /* Turn on bridge */ + gpio_output(GPIO_EDPBRDG_RST_L, 0); + gpio_output(GPIO_EN_PP1000_EDPBRDG, 1); + gpio_output(GPIO_EN_PP1800_EDPBRDG, 1); + gpio_output(GPIO_EN_PP3300_EDPBRDG, 1); + mdelay(14); + gpio_output(GPIO_EDPBRDG_PWREN, 1); + mdelay(10); + gpio_output(GPIO_EDPBRDG_RST_L, 1); } -static int bridge_post_poweron(u8 i2c_bus, struct edid *edid) +/* Display function */ +static void backlight_control(void) { - if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON)) - return anx7625_dp_start(i2c_bus, edid); - - return 0; + /* Disable backlight before turning on bridge */ + gpio_output(GPIO_AP_EDP_BKLTEN, 0); + gpio_output(GPIO_BL_PWM_1V8, 0); + gpio_output(GPIO_EN_PP3300_DISP_X, 1); } +static const struct edp_bridge anx7625_bridge = { + .power_on = bridge_anx7625_power_on, + .get_edid = bridge_anx7625_get_edid, + .post_power_on = bridge_anx7625_post_power_on, +}; + +static const struct edp_bridge ps8640_bridge = { + .power_on = bridge_ps8640_power_on, + .get_edid = bridge_ps8640_get_edid, + .post_power_on = NULL, +}; + +_Static_assert(CONFIG(BOARD_GOOGLE_KINGLER_COMMON) + CONFIG(BOARD_GOOGLE_KRABBY_COMMON) == 1, + "Exactly one of KINGLER and KRABBY must be set"); + int configure_display(void) { struct edid edid; const u8 i2c_bus = I2C0; + const struct edp_bridge *bridge; + + if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON)) + bridge = &anx7625_bridge; + else /* BOARD_GOOGLE_KRABBY_COMMON */ + bridge = &ps8640_bridge; printk(BIOS_INFO, "%s: Starting display init\n", __func__); - configure_backlight_and_bridge(); mtk_i2c_bus_init(i2c_bus, I2C_SPEED_FAST); - if (bridge_setup(i2c_bus, &edid) < 0) { - printk(BIOS_ERR, "%s: Failed to set bridge\n", __func__); - return -1; + /* Set up backlight control pins as output pin and power-off by default */ + backlight_control(); + + if (bridge->power_on) + bridge->power_on(); + + if (bridge->get_edid) { + if (bridge->get_edid(i2c_bus, &edid) < 0) { + printk(BIOS_ERR, "%s: Failed to get edid\n", __func__); + return -1; + } } const char *name = edid.ascii_string; @@ -101,9 +150,11 @@ return -1; } - if (bridge_post_poweron(i2c_bus, &edid) < 0) { - printk(BIOS_ERR, "%s: Failed to post poweron bridge\n", __func__); - return -1; + if (bridge->post_power_on) { + if (bridge->post_power_on(i2c_bus, &edid) < 0) { + printk(BIOS_ERR, "%s: Failed to post power on bridge\n", __func__); + return -1; + } } mtk_ddp_mode_set(&edid); diff --git a/src/mainboard/google/corsola/display.h b/src/mainboard/google/corsola/display.h index 525422b..4e883f2 100644 --- a/src/mainboard/google/corsola/display.h +++ b/src/mainboard/google/corsola/display.h @@ -3,6 +3,14 @@ #ifndef __MAINBOARD_GOOGLE_CORSOLA_DISPLAY_H__ #define __MAINBOARD_GOOGLE_CORSOLA_DISPLAY_H__ +#include <edid.h> + +struct edp_bridge { + void (*power_on)(void); + int (*get_edid)(u8 i2c_bus, struct edid *edid); + int (*post_power_on)(u8 i2c_bus, struct edid *edid); +}; + int configure_display(void); #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/60447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I314d5407c40429bb7bc50f36fece58e396b27548 Gerrit-Change-Number: 60447 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek/mt8186: Add support for regulator VRF12/VCN33
by Rex-BC Chen (Code Review) 29 Dec '21

29 Dec '21

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60446 ) Change subject: soc/mediatek/mt8186: Add support for regulator VRF12/VCN33 ...................................................................... soc/mediatek/mt8186: Add support for regulator VRF12/VCN33 To provide power to PS8640, the eDP bridge IC on krabby, add control of VRF12 and VCN33 to set voltage from MT6366. TEST=measure 1.2V from VRF12 and 3.3V from VCN33. BUG=b:210806060 Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I55a9ca16e1e335e9355d0a1b30c278a9969db197 --- M src/mainboard/google/corsola/regulator.c M src/soc/mediatek/common/include/soc/regulator.h M src/soc/mediatek/mt8186/include/soc/mt6366.h M src/soc/mediatek/mt8186/mt6366.c 4 files changed, 83 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/60446/1 diff --git a/src/mainboard/google/corsola/regulator.c b/src/mainboard/google/corsola/regulator.c index 1dd26d3..d607497 100644 --- a/src/mainboard/google/corsola/regulator.c +++ b/src/mainboard/google/corsola/regulator.c @@ -20,6 +20,8 @@ [MTK_REGULATOR_VMC] = MT6366_VMC, [MTK_REGULATOR_VPROC12] = MT6366_VPROC12, [MTK_REGULATOR_VSRAM_PROC12] = MT6366_VSRAM_PROC12, + [MTK_REGULATOR_VRF12] = MT6366_VRF12, + [MTK_REGULATOR_VCN33] = MT6366_VCN33, }; _Static_assert(ARRAY_SIZE(regulator_id) == MTK_REGULATOR_NUM, "regulator_id size error"); diff --git a/src/soc/mediatek/common/include/soc/regulator.h b/src/soc/mediatek/common/include/soc/regulator.h index 5068f50..84bb364 100644 --- a/src/soc/mediatek/common/include/soc/regulator.h +++ b/src/soc/mediatek/common/include/soc/regulator.h @@ -18,6 +18,8 @@ MTK_REGULATOR_VMC, MTK_REGULATOR_VPROC12, MTK_REGULATOR_VSRAM_PROC12, + MTK_REGULATOR_VRF12, + MTK_REGULATOR_VCN33, MTK_REGULATOR_NUM, }; diff --git a/src/soc/mediatek/mt8186/include/soc/mt6366.h b/src/soc/mediatek/mt8186/include/soc/mt6366.h index af77da2..2315a24 100644 --- a/src/soc/mediatek/mt8186/include/soc/mt6366.h +++ b/src/soc/mediatek/mt8186/include/soc/mt6366.h @@ -43,10 +43,14 @@ PMIC_VSRAM_PROC12_OP_EN = 0x1b90, PMIC_VSRAM_PROC12_DBG0 = 0x1ba2, PMIC_VSRAM_PROC12_VOSEL = 0x1bf0, + PMIC_LDO_VRF12_CON0 = 0x1c30, + PMIC_LDO_VRF12_OP_EN = 0x1c32, PMIC_LDO_VMC_CON0 = 0x1cc4, PMIC_LDO_VMC_OP_EN = 0x1cc6, PMIC_LDO_VMCH_CON0 = 0x1cd8, PMIC_LDO_VMCH_OP_EN = 0x1cda, + PMIC_LDO_VCN33_CON0_0 = 0x1d1c, + PMIC_VCN33_ANA_CON0 = 0x1e28, PMIC_VSIM2_ANA_CON0 = 0x1e30, PMIC_VMCH_ANA_CON0 = 0x1e48, PMIC_VMC_ANA_CON0 = 0x1e4c, @@ -61,6 +65,8 @@ MT6366_VMC, MT6366_VPROC12, MT6366_VSRAM_PROC12, + MT6366_VRF12, + MT6366_VCN33, MT6366_REGULATOR_NUM, }; diff --git a/src/soc/mediatek/mt8186/mt6366.c b/src/soc/mediatek/mt8186/mt6366.c index 5cec47a..9ca7c05 100644 --- a/src/soc/mediatek/mt8186/mt6366.c +++ b/src/soc/mediatek/mt8186/mt6366.c @@ -705,6 +705,68 @@ pwrap_write_field(PMIC_LDO_VMC_CON0, 1, 0xFF, 0); } +static u32 pmic_get_vrf12_vol(void) +{ + return (pwrap_read_field(PMIC_LDO_VRF12_CON0, 0x3, 0) & + pwrap_read_field(PMIC_LDO_VRF12_OP_EN, 0x3, 0)) ? 1200000 : 0; +} + +static void pmic_enable_vrf12(void) +{ + pwrap_write_field(PMIC_LDO_VRF12_CON0, 1, 0x3, 0); + pwrap_write_field(PMIC_LDO_VRF12_OP_EN, 1, 0x3, 0); +} + +static u32 pmic_get_vcn33_vol(void) +{ + u32 ret; + u16 vol_reg; + + vol_reg = pwrap_read_field(PMIC_VCN33_ANA_CON0, 0x3, 8); + + switch (vol_reg) { + case 0x1: + ret = 3300000; + break; + case 0x2: + ret = 3400000; + break; + case 0x3: + ret = 3500000; + break; + default: + printk(BIOS_ERR, "ERROR[%s] VCN33 read fail: %d\n", __func__, vol_reg); + ret = 0; + break; + } + return ret; +} + +static void pmic_set_vcn33_vol(u32 vcn33_uv) +{ + u16 val = 0; + + switch (vcn33_uv) { + case 3300000: + val = 0x1; + break; + case 3400000: + val = 0x2; + break; + case 3500000: + val = 0x3; + break; + default: + die("ERROR[%s]: VCN33 voltage %u is not support.\n", __func__, vcn33_uv); + return; + } + + pwrap_write_field(PMIC_VCN33_ANA_CON0, val, 0x3, 8); + + /* Force SW to turn on */ + pwrap_write_field(PMIC_LDO_VCN33_CON0_0, 1, 0x1, 0); +} + static void pmic_wdt_set(void) { /* [5]=1, RG_WDTRSTB_DEB */ @@ -824,6 +886,13 @@ case MT6366_VSRAM_PROC12: pmic_set_vsram_proc12_vol(voltage_uv); break; + case MT6366_VRF12: + /* VRF12 only provides 1.2V, so we just need to enable it */ + pmic_enable_vrf12(); + break; + case MT6366_VCN33: + pmic_set_vcn33_vol(voltage_uv); + break; default: printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id); break; @@ -847,6 +916,10 @@ return pmic_get_vproc12_vol(); case MT6366_VSRAM_PROC12: return pmic_get_vsram_proc12_vol(); + case MT6366_VRF12: + return pmic_get_vrf12_vol(); + case MT6366_VCN33: + return pmic_get_vcn33_vol(); default: printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id); break; -- To view, visit https://review.coreboot.org/c/coreboot/+/60446 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I55a9ca16e1e335e9355d0a1b30c278a9969db197 Gerrit-Change-Number: 60446 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake: Add option to make MRC log silent
by EricR Lai (Code Review) 29 Dec '21

29 Dec '21

Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Andrey Petrov, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60441 ) Change subject: soc/intel/alderlake: Add option to make MRC log silent ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > `RMT` is a separate UPD which enable more data. […] I see, thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/60441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 Gerrit-Change-Number: 60441 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 29 Dec 2021 08:35:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add option to make MRC log silent
by Subrata Banik (Code Review) 29 Dec '21

29 Dec '21

Attention is currently required from: Felix Singer, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Andrey Petrov, Patrick Rudolph, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60441 ) Change subject: soc/intel/alderlake: Add option to make MRC log silent ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > For the RMT tool, level 3 is enough? `RMT` is a separate UPD which enable more data. By default MRC debug msg level is `3` -- To view, visit https://review.coreboot.org/c/coreboot/+/60441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 Gerrit-Change-Number: 60441 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 29 Dec 2021 08:33:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Fix incorrect comment about debug consent
by EricR Lai (Code Review) 29 Dec '21

29 Dec '21

Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Arthur Heymans, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60443 ) Change subject: soc/intel/alderlake: Fix incorrect comment about debug consent ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60443 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5eeb4f02d051dc1efba2deaecb51cbc7eac51f5 Gerrit-Change-Number: 60443 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 29 Dec 2021 08:26:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add option to make MRC log silent
by EricR Lai (Code Review) 29 Dec '21

29 Dec '21

Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Andrey Petrov, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60441 ) Change subject: soc/intel/alderlake: Add option to make MRC log silent ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: For the RMT tool, level 3 is enough? -- To view, visit https://review.coreboot.org/c/coreboot/+/60441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 Gerrit-Change-Number: 60441 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 29 Dec 2021 08:24:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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