Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60465 )
Change subject: ec/google/chromeec/acpi: Replace LAnd() with ASL 2.0 syntax
......................................................................
ec/google/chromeec/acpi: Replace LAnd() with ASL 2.0 syntax
Replace `LAnd (a, b)` with `a && b`.
Change-Id: I7d74e6a2ce4ee98c1c0f5b412e20661c5196735e
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60465
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas(a)noos.fr>
---
M src/ec/google/chromeec/acpi/battery.asl
1 file changed, 2 insertions(+), 3 deletions(-)
Approvals:
build bot (Jenkins): Verified
HAOUAS Elyes: Looks good to me, approved
diff --git a/src/ec/google/chromeec/acpi/battery.asl b/src/ec/google/chromeec/acpi/battery.asl
index fc9edc9..7569728 100644
--- a/src/ec/google/chromeec/acpi/battery.asl
+++ b/src/ec/google/chromeec/acpi/battery.asl
@@ -201,7 +201,7 @@
// 2: BATTERY REMAINING CAPACITY
//
Store (BTRA, Local1)
- If (LAnd (Arg3, LAnd (ACEX, LNot (LAnd (BFDC, BFCG))))) {
+ If (Arg3 && ACEX && LNot (BFDC && BFCG)) {
// On AC power and battery is neither charging
// nor discharging. Linux expects a full battery
// to report same capacity as last full charge.
@@ -210,8 +210,7 @@
// See if within ~6% of full
ShiftRight (Local2, 4, Local3)
- If (LAnd (LGreater (Local1, Subtract (Local2, Local3)),
- LLess (Local1, Add (Local2, Local3))))
+ If (LGreater (Local1, Subtract (Local2, Local3)) && LLess (Local1, Add (Local2, Local3)))
{
Store (Local2, Local1)
}
--
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Gerrit-Change-Id: I7d74e6a2ce4ee98c1c0f5b412e20661c5196735e
Gerrit-Change-Number: 60465
Gerrit-PatchSet: 5
Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
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Nick Vaccaro has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60326 )
Change subject: mb/google/brya: fix tanik, adlrvp_n_ext_ec, and vell override.cb
......................................................................
mb/google/brya: fix tanik, adlrvp_n_ext_ec, and vell override.cb
Taniks, adlrvp_n_ext_ec, and vell were still using an older (and
now obsolete) way of defining the port numbers for the pmc_mux
connectors.
Update taniks, aldrvp_n_ext_ec, and vell to use new method of defining
the ports.
BUG=b:212688966
TEST='emerge-brya coreboot chromeos-bootimage' and verify it builds
correctly.
Change-Id: Ie69a143ea2a43a1ee5a3c9f79975e1831e88c4b4
Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com>
---
M src/mainboard/google/brya/variants/taniks/overridetree.cb
M src/mainboard/google/brya/variants/vell/overridetree.cb
M src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb
3 files changed, 14 insertions(+), 14 deletions(-)
Approvals:
YH Lin: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/google/brya/variants/taniks/overridetree.cb b/src/mainboard/google/brya/variants/taniks/overridetree.cb
index deb31ce..cb8c99a 100644
--- a/src/mainboard/google/brya/variants/taniks/overridetree.cb
+++ b/src/mainboard/google/brya/variants/taniks/overridetree.cb
@@ -365,13 +365,13 @@
chip drivers/intel/pmc_mux
device generic 0 on
chip drivers/intel/pmc_mux/conn
- register "usb2_port_number" = "1"
- register "usb3_port_number" = "1"
+ use usb2_port1 as usb2_port
+ use tcss_usb3_port1 as usb3_port
device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
- register "usb2_port_number" = "3"
- register "usb3_port_number" = "3"
+ use usb2_port3 as usb2_port
+ use tcss_usb3_port3 as usb3_port
device generic 2 alias conn1 on end
end
end
diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb
index 7595c6f..4f5da7f 100644
--- a/src/mainboard/google/brya/variants/vell/overridetree.cb
+++ b/src/mainboard/google/brya/variants/vell/overridetree.cb
@@ -253,13 +253,13 @@
chip drivers/intel/pmc_mux
device generic 0 on
chip drivers/intel/pmc_mux/conn
- register "usb2_port_number" = "1"
- register "usb3_port_number" = "1"
+ use usb2_port1 as usb2_port
+ use tcss_usb3_port1 as usb3_port
device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
- register "usb2_port_number" = "3"
- register "usb3_port_number" = "3"
+ use usb2_port3 as usb2_port
+ use tcss_usb3_port3 as usb3_port
device generic 1 alias conn1 on end
end
end
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb
index e78d00f..de5471c 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb
@@ -34,22 +34,22 @@
chip drivers/intel/pmc_mux
device generic 0 on
chip drivers/intel/pmc_mux/conn
- register "usb2_port_number" = "1"
- register "usb3_port_number" = "1"
+ use usb2_port1 as usb2_port
+ use tcss_usb3_port1 as usb3_port
# SBU is fixed, HSL follows CC
register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
- register "usb2_port_number" = "2"
- register "usb3_port_number" = "2"
+ use usb2_port2 as usb2_port
+ use tcss_usb3_port2 as usb3_port
# SBU is fixed, HSL follows CC
register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
device generic 1 alias conn1 on end
end
chip drivers/intel/pmc_mux/conn
- register "usb2_port_number" = "3"
- register "usb3_port_number" = "3"
+ use usb2_port3 as usb2_port
+ use tcss_usb3_port3 as usb3_port
# SBU is fixed, HSL follows CC
register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
device generic 2 alias conn2 on end
3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
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Attention is currently required from: Reka Norman, Tim Wawrzynczak, Nick Vaccaro, Zhuohao Lee.
Hello Reka Norman, YH Lin, Tim Wawrzynczak, Zhuohao Lee, EricR Lai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60326
to look at the new patch set (#4).
Change subject: mb/google/brya: fix tanik, adlrvp_n_ext_ec, and vell override.cb
......................................................................
mb/google/brya: fix tanik, adlrvp_n_ext_ec, and vell override.cb
Taniks, adlrvp_n_ext_ec, and vell were still using an older (and
now obsolete) way of defining the port numbers for the pmc_mux
connectors.
Update taniks, aldrvp_n_ext_ec, and vell to use new method of defining
the ports.
BUG=b:212688966
TEST='emerge-brya coreboot chromeos-bootimage' and verify it builds
correctly.
Change-Id: Ie69a143ea2a43a1ee5a3c9f79975e1831e88c4b4
Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com>
---
M src/mainboard/google/brya/variants/taniks/overridetree.cb
M src/mainboard/google/brya/variants/vell/overridetree.cb
M src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb
3 files changed, 14 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/60326/4
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60535 )
Change subject: [WIP]mb/prodrive/hermes: Fix BMC PCIe KVM
......................................................................
Patch Set 1: Code-Review-1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60535/comment/967a2df4_f4d4dd0d
PS1, Line 11:
> Are there different board revision available in public? So will this change cause regressions on older revisions?
I assumed the schematics were older than our board but that may not be the case. Still looking into what is required and how to fix it.
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Change subject: mb/google/brya: fix tanik, adlrvp_n_ext_ec, and vell override.cb
......................................................................
Patch Set 3: Code-Review+2
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Hello Reka Norman, YH Lin, Tim Wawrzynczak, Zhuohao Lee, EricR Lai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60326
to look at the new patch set (#3).
Change subject: mb/google/brya: fix tanik, adlrvp_n_ext_ec, and vell override.cb
......................................................................
mb/google/brya: fix tanik, adlrvp_n_ext_ec, and vell override.cb
Taniks, adlrvp_n_ext_ec, and vell were still using an older (and
now obsolete) way of defining the port numbers for the pmc_mux
connectors.
Update taniks and vell to use new method of defining the ports.
BUG=b:212688966
TEST='emerge-brya coreboot chromeos-bootimage' and verify it builds
correctly.
Change-Id: Ie69a143ea2a43a1ee5a3c9f79975e1831e88c4b4
Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com>
---
M src/mainboard/google/brya/variants/taniks/overridetree.cb
M src/mainboard/google/brya/variants/vell/overridetree.cb
M src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb
3 files changed, 14 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/60326/3
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Change subject: mb/google/brya: fix taniks' and vell's override.cb
......................................................................
Patch Set 2: Code-Review+2
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