coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ec/quanta/it8518/acpi: Replace Add(a,b) with ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Felix Singer. HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60511 ) Change subject: ec/quanta/it8518/acpi: Replace Add(a,b) with ASL 2.0 syntax ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib00f671d448aa1987542dd1ec81410df65695708 Gerrit-Change-Number: 60511 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Thu, 30 Dec 2021 18:04:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: sb/intel/i82801jx/acpi: Replace Add(a,b,c) with ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Felix Singer, Patrick Rudolph. HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60513 ) Change subject: sb/intel/i82801jx/acpi: Replace Add(a,b,c) with ASL 2.0 syntax ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60513 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I738a521a12363e0b6123e3d4e22721fb459925d1 Gerrit-Change-Number: 60513 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 30 Dec 2021 18:03:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: ec/quanta/ene_kb3940q/acpi: Replace Add(a,b) with ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Felix Singer. HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60510 ) Change subject: ec/quanta/ene_kb3940q/acpi: Replace Add(a,b) with ASL 2.0 syntax ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b93cf20a96f85e1a5e130bebdd72fbb86acc266 Gerrit-Change-Number: 60510 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Thu, 30 Dec 2021 18:03:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: sb/intel/i82801ix/acpi: Replace Add(a,b,c) with ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Felix Singer, Patrick Rudolph. HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60514 ) Change subject: sb/intel/i82801ix/acpi: Replace Add(a,b,c) with ASL 2.0 syntax ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09a37ff47002640c7bbc151028b4d4576f9fbfac Gerrit-Change-Number: 60514 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 30 Dec 2021 18:02:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: google/herobrine: configure gpio to detect board ID.
by Paul Menzel (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Ravi kumar, Ravi Kumar Bokka, Sudheer Amrabadi. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56642 ) Change subject: google/herobrine: configure gpio to detect board ID. ...................................................................... Patch Set 37: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/56642/comment/eb2669ed_420fa4bf PS37, Line 7: google/herobrine: configure gpio to detect board ID. Please remove the dot/period at the end of the commit message summary. -- To view, visit https://review.coreboot.org/c/coreboot/+/56642 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6de2a7e7b11ecce8325e0fd44dc7221d73729390 Gerrit-Change-Number: 56642 Gerrit-PatchSet: 37 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Comment-Date: Thu, 30 Dec 2021 17:53:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add option to make MRC log silent
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Felix Singer, Nico Huber, Paul Menzel, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Andrey Petrov, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60441 ) Change subject: soc/intel/alderlake: Add option to make MRC log silent ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60441/comment/2ab51035_6de459cf PS3, Line 16: HAVE_DEBUG_RAM_SETUP > Yes, I will fix it and submit a CL that default selects HAVE_DEBUG_RAM_SETUP (similar I saw on MTK project) and if SoC want to select debug binary then they do select DEBUG_RAM_SETUP. > > WDYT about that? Raised a CL here CB:60536 -- To view, visit https://review.coreboot.org/c/coreboot/+/60441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 Gerrit-Change-Number: 60441 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 30 Dec 2021 17:49:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add provision to enable SoC debug interface
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60536 ) Change subject: soc/intel/alderlake: Add provision to enable SoC debug interface ...................................................................... soc/intel/alderlake: Add provision to enable SoC debug interface This patch default selects `HAVE_DEBUG_RAM_SETUP` config to let SoC users enable `DEBUG_SOC_INTERFACE` as per platform debug need. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I259c8069414de5b045a59279a3e4a62bc392588f --- M src/soc/intel/alderlake/Kconfig 1 file changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/60536/1 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 0c68351..d860b06 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -45,6 +45,7 @@ select GENERIC_GPIO_LIB select HAVE_FSP_GOP select INTEL_DESCRIPTOR_MODE_CAPABLE + select HAVE_DEBUG_RAM_SETUP select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE select INTEL_GMA_ACPI @@ -109,6 +110,12 @@ select COS_MAPPED_TO_MSB select CAR_HAS_L3_PROTECTED_WAYS +config DEBUG_SOC_INTERFACE + bool "The top level switch to enable soc debug interface" + default n + select DEBUG_RAM_SETUP + select SOC_INTEL_DEBUG_CONSENT + config MAX_CPUS int default 24 -- To view, visit https://review.coreboot.org/c/coreboot/+/60536 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I259c8069414de5b045a59279a3e4a62bc392588f Gerrit-Change-Number: 60536 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/fsp: Map FSP debug level to coreboot console level
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Nico Huber, Paul Menzel, Tim Wawrzynczak, Angel Pons, Andrey Petrov, Patrick Rudolph, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60471 ) Change subject: drivers/intel/fsp: Map FSP debug level to coreboot console level ...................................................................... Patch Set 2: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60471/comment/4b36f612_60bea487 PS2, Line 7: Creates > Create Ack https://review.coreboot.org/c/coreboot/+/60471/comment/5f72ab66_79078ba8 PS2, Line 7: drivers/intel/fsp: Creates map between FSP and coreboot console level > Maybe: […] Ack https://review.coreboot.org/c/coreboot/+/60471/comment/252b981c_69687972 PS2, Line 7: drivers/intel/fsp: Creates map between FSP and coreboot console level > Maybe: […] Ack https://review.coreboot.org/c/coreboot/+/60471/comment/c0f7c214_aa2a9559 PS2, Line 7: Creates > Create Ack https://review.coreboot.org/c/coreboot/+/60471/comment/680ea34b_6bdd13e6 PS2, Line 9: performs a map between coreboot console level and FSP : debug level > maps coreboto console level to FSP debug level Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/60471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec Gerrit-Change-Number: 60471 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Thu, 30 Dec 2021 17:29:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add option to make MRC log silent
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Felix Singer, Nico Huber, Paul Menzel, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Andrey Petrov, Patrick Rudolph. Hello Felix Singer, build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60441 to look at the new patch set (#5). Change subject: soc/intel/alderlake: Add option to make MRC log silent ...................................................................... soc/intel/alderlake: Add option to make MRC log silent Typically, FSP-M aka MRC debug log level defaults to `3` meaning prints all `Load, Error, Warnings & Info` messages. Sometimes it's too much information to parse even when users aren't required to have such detailed information hence, implement `fsp_map_console_log_level()` that maps coreboot console log level to FSP-M debug log level and suppress verbose MRC debug messages unless caller selects `HAVE_DEBUG_RAM_SETUP` config and then the user can enable `DEBUG_RAM_SETUP`. TEST=FSP-M debug log suggested default `SerialDebugMrcLevel` UPD value is `2`. While the user selects `HAVE_DEBUG_RAM_SETUP` and `DEBUG_RAM_SETUP` configs `SerialDebugMrcLevel` UPD value is overridden to '5' aka verbose. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/60441/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/60441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 Gerrit-Change-Number: 60441 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/intel/fsp: Map FSP debug level to coreboot console level
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Nico Huber, Subrata Banik, Tim Wawrzynczak, Angel Pons, Andrey Petrov, Patrick Rudolph, EricR Lai. Hello build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Angel Pons, Andrey Petrov, Patrick Rudolph, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60471 to look at the new patch set (#3). Change subject: drivers/intel/fsp: Map FSP debug level to coreboot console level ...................................................................... drivers/intel/fsp: Map FSP debug level to coreboot console level This patch maps coreboot console level to FSP debug level. This is useful to suppress MRC (FSP-M) debug logs. Callers have to select HAVE_DEBUG_RAM_SETUP config to get verbose MRC debug log, Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec --- M src/drivers/intel/fsp2_0/debug.c M src/drivers/intel/fsp2_0/include/fsp/debug.h 2 files changed, 46 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/60471/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/60471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec Gerrit-Change-Number: 60471 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit December 2021