coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/alderlake: Add option to make MRC log silent
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Felix Singer, Nico Huber, Paul Menzel, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Andrey Petrov, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60441 ) Change subject: soc/intel/alderlake: Add option to make MRC log silent ...................................................................... Patch Set 3: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60441/comment/18b5f0ed_9aba746d PS3, Line 9: is default set to > defaults to Ack https://review.coreboot.org/c/coreboot/+/60441/comment/ba95595c_5fc704a3 PS3, Line 10: Messages > messages Ack https://review.coreboot.org/c/coreboot/+/60441/comment/0fe539f5_6e3363e2 PS3, Line 14: implemented `fsp_map_console_log_level()` that maps coreboot console > implement Ack https://review.coreboot.org/c/coreboot/+/60441/comment/998d63e5_63630567 PS3, Line 16: HAVE_DEBUG_RAM_SETUP > Actually, this commit should select HAVE_DEBUG_RAM_SETUP and then […] Yes, I will fix it and submit a CL that default selects HAVE_DEBUG_RAM_SETUP (similar I saw on MTK project) and if SoC want to select debug binary then they do select DEBUG_RAM_SETUP. WDYT about that? Patchset: PS2: > Yes, very nice, thank you. And good call to move the mapping function to common […] 👍 Thanks for the suggestion at the first place. -- To view, visit https://review.coreboot.org/c/coreboot/+/60441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 Gerrit-Change-Number: 60441 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 30 Dec 2021 17:25:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add option to make MRC log silent
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Andrey Petrov, Patrick Rudolph. Hello Felix Singer, build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60441 to look at the new patch set (#4). Change subject: soc/intel/alderlake: Add option to make MRC log silent ...................................................................... soc/intel/alderlake: Add option to make MRC log silent Typically, FSP-M aka MRC debug log level defaults to `3` meaning prints all `Load, Error, Warnings & Info` messages. Sometimes it's too much information to parse even when users aren't required to have such detailed information hence, implement `fsp_map_console_log_level()` that maps coreboot console log level to FSP-M debug log level and suppress verbose MRC debug messages unless caller selects `HAVE_DEBUG_RAM_SETUP` config and then the user can enable `DEBUG_RAM_SETUP`. TEST=FSP-M debug log suggested default `SerialDebugMrcLevel` UPD value is `2`. While the user selects `HAVE_DEBUG_RAM_SETUP` and `DEBUG_RAM_SETUP` configs `SerialDebugMrcLevel` UPD value is overridden to '5' aka verbose. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/60441/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/60441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 Gerrit-Change-Number: 60441 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: google/herobrine: configure gpio to detect board ID.
by Shelley Chen (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Ravi kumar, Ravi Kumar Bokka, Sudheer Amrabadi. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56642 ) Change subject: google/herobrine: configure gpio to detect board ID. ...................................................................... Patch Set 37: Code-Review+2 (13 comments) Patchset: PS37: Hi Ravi, please resolve the fixes that you made after you fix them. It makes it easier for the reviewer to see what you did between patches. Thanks! File src/mainboard/google/herobrine/boardid.c: https://review.coreboot.org/c/coreboot/+/56642/comment/1b98d37d_f7f09699 PS36, Line 14: if (CONFIG(BOARD_GOOGLE_HEROBRINE)){ > > space required before the open brace '{' […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/66347079_438a1015 PS36, Line 19: else if (CONFIG(BOARD_GOOGLE_PIGLIN) || CONFIG(BOARD_GOOGLE_HOGLIN) || CONFIG(BOARD_GOOGLE_SENOR)){ > > else should follow close brace '}' […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/207459a5_39bf1ae3 PS36, Line 19: else if (CONFIG(BOARD_GOOGLE_PIGLIN) || CONFIG(BOARD_GOOGLE_HOGLIN) || CONFIG(BOARD_GOOGLE_SENOR)){ > > line over 96 characters […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/1feaf90f_0678af9e PS36, Line 19: else if (CONFIG(BOARD_GOOGLE_PIGLIN) || CONFIG(BOARD_GOOGLE_HOGLIN) || CONFIG(BOARD_GOOGLE_SENOR)){ > > space required before the open brace '{' […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/20e9ec54_82c5a0fd PS36, Line 20: pins[2] = GPIO(50); > > please, no spaces at the start of a line […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/efbea88e_0f95edc4 PS36, Line 20: pins[2] = GPIO(50); > > code indent should use tabs where possible […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/1169f3bb_cf5c3368 PS36, Line 21: pins[1] = GPIO(49); > > please, no spaces at the start of a line […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/3cdcd765_5d2d5d8d PS36, Line 21: pins[1] = GPIO(49); > > code indent should use tabs where possible […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/bd6cb616_53eefe03 PS36, Line 22: pins[0] = GPIO(48); > > code indent should use tabs where possible […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/2e853318_54878b98 PS36, Line 22: pins[0] = GPIO(48); > > please, no spaces at the start of a line […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/9d47bc4e_db659eba PS36, Line 26: if (id == UNDEFINED_STRAPPING_ID){ > > braces {} are not necessary for single statement blocks […] Done https://review.coreboot.org/c/coreboot/+/56642/comment/905837d0_6e1030ce PS36, Line 26: if (id == UNDEFINED_STRAPPING_ID){ > > space required before the open brace '{' […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/56642 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6de2a7e7b11ecce8325e0fd44dc7221d73729390 Gerrit-Change-Number: 56642 Gerrit-PatchSet: 37 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Comment-Date: Thu, 30 Dec 2021 17:22:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp: Creates map between FSP and coreboot console level
by Paul Menzel (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Nico Huber, Subrata Banik, Tim Wawrzynczak, Angel Pons, Andrey Petrov, Patrick Rudolph, EricR Lai. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60471 ) Change subject: drivers/intel/fsp: Creates map between FSP and coreboot console level ...................................................................... Patch Set 2: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60471/comment/173679a2_ba38d8c7 PS2, Line 7: Creates Create https://review.coreboot.org/c/coreboot/+/60471/comment/700177e1_8f489890 PS2, Line 7: drivers/intel/fsp: Creates map between FSP and coreboot console level Maybe: > Map FSP debug level to coreboot console level https://review.coreboot.org/c/coreboot/+/60471/comment/26733a5a_06df1c6b PS2, Line 9: performs a map between coreboot console level and FSP : debug level maps coreboto console level to FSP debug level -- To view, visit https://review.coreboot.org/c/coreboot/+/60471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec Gerrit-Change-Number: 60471 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Thu, 30 Dec 2021 17:21:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp: Creates map between FSP and coreboot console level
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Angel Pons, Andrey Petrov, Patrick Rudolph, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60471 ) Change subject: drivers/intel/fsp: Creates map between FSP and coreboot console level ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60471/comment/2b8b6a43_1dd41d82 PS1, Line 12: Users to select HAVE_DEBUG_RAM_SETUP > HAVE_DEBUG_RAM_SETUP is merely used to hide/show the user-selectable […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/60471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec Gerrit-Change-Number: 60471 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Thu, 30 Dec 2021 17:17:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp: Creates map between FSP and coreboot console level
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Angel Pons, Andrey Petrov, Patrick Rudolph, EricR Lai. Hello build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Angel Pons, Andrey Petrov, Patrick Rudolph, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60471 to look at the new patch set (#2). Change subject: drivers/intel/fsp: Creates map between FSP and coreboot console level ...................................................................... drivers/intel/fsp: Creates map between FSP and coreboot console level This patch performs a map between coreboot console level and FSP debug level. This would be useful to suppress MRC (FSP-M) debug logs. Callers have to select HAVE_DEBUG_RAM_SETUP config to get verbose MRC debug log, Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec --- M src/drivers/intel/fsp2_0/debug.c M src/drivers/intel/fsp2_0/include/fsp/debug.h 2 files changed, 46 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/60471/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec Gerrit-Change-Number: 60471 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: console: Create helper function to get max console log level
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Angel Pons, EricR Lai. Hello build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Angel Pons, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60470 to look at the new patch set (#2). Change subject: console: Create helper function to get max console log level ...................................................................... console: Create helper function to get max console log level This patch takes console level as argument and returns log level as per `loglevel.h` file to be used while printing serial messages. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I56349f22c71c9db757b2be8eeb2dbfe959f80397 --- M src/console/init.c M src/include/console/console.h 2 files changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/60470/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60470 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56349f22c71c9db757b2be8eeb2dbfe959f80397 Gerrit-Change-Number: 60470 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: console: Create helper function to get max console log level
by Subrata Banik (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Angel Pons, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60470 ) Change subject: console: Create helper function to get max console log level ...................................................................... Patch Set 1: (3 comments) File src/console/init.c: https://review.coreboot.org/c/coreboot/+/60470/comment/b0356acb_0b33075d PS1, Line 50: if (console_level == CONSOLE_LOG_NONE) : return BIOS_NEVER; > This seems tricky. BIOS_NEVER is actually the highest (above SPEW) […] I agree, I even had the same confusion about is this right returning BIOS_NEVER which holds highest value instead its better return 0 or -1. https://review.coreboot.org/c/coreboot/+/60470/comment/8665a0eb_bbbfd1bf PS1, Line 60: return 0; > 0 is BIOS_EMERG. If we wanted to forbid all output (IMO valid on this […] make sense to me as well, returning -1 as its invalid log level. File src/include/console/console.h: https://review.coreboot.org/c/coreboot/+/60470/comment/224c7e45_9c2174d6 PS1, Line 67: static inline int console_log_level(int msg_level) { return 0; } > We should have a similar dummy here. ahh, my bad. Thanks for highlighting -- To view, visit https://review.coreboot.org/c/coreboot/+/60470 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56349f22c71c9db757b2be8eeb2dbfe959f80397 Gerrit-Change-Number: 60470 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Thu, 30 Dec 2021 17:06:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cannonlake/acpi: Replace LAnd() with ASL 2.0 syntax
by Felix Singer (Code Review) 30 Dec '21

30 Dec '21

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60468 ) Change subject: soc/intel/cannonlake/acpi: Replace LAnd() with ASL 2.0 syntax ...................................................................... soc/intel/cannonlake/acpi: Replace LAnd() with ASL 2.0 syntax Replace `LAnd (a, b)` with `a && b`. Change-Id: I259bd218ac3f786cef6e05386f6dc55ccaf6b911 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60468 Reviewed-by: HAOUAS Elyes <ehaouas(a)noos.fr> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/cannonlake/acpi/gpio.asl M src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl M src/soc/intel/cannonlake/acpi/pch_hda.asl 3 files changed, 10 insertions(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl index 7776acc..6b15f80 100644 --- a/src/soc/intel/cannonlake/acpi/gpio.asl +++ b/src/soc/intel/cannonlake/acpi/gpio.asl @@ -61,31 +61,31 @@ Method (GADD, 1, NotSerialized) { /* GPIO Community 0 */ - If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, SPI0_CLK_LOOPBK))) + If (LGreaterEqual (Arg0, GPP_A0) && LLessEqual (Arg0, SPI0_CLK_LOOPBK)) { Store (PID_GPIOCOM0, Local0) Subtract (Arg0, GPP_A0, Local1) } /* GPIO Community 1 */ - If (LAnd (LGreaterEqual (Arg0, GPP_D0), LLessEqual (Arg0, vSD3_CD_B))) + If (LGreaterEqual (Arg0, GPP_D0) && LLessEqual (Arg0, vSD3_CD_B)) { Store (PID_GPIOCOM1, Local0) Subtract (Arg0, GPP_D0, Local1) } /* GPIO Community 2 */ - If (LAnd (LGreaterEqual (Arg0, GPD0), LLessEqual (Arg0, DRAM_RESET_B))) + If (LGreaterEqual (Arg0, GPD0) && LLessEqual (Arg0, DRAM_RESET_B)) { Store (PID_GPIOCOM2, Local0) Subtract (Arg0, GPD0, Local1) } /* GPIO Community 3 */ - If (LAnd (LGreaterEqual (Arg0, HDA_BCLK), LLessEqual (Arg0, TRIGGER_OUT))) + If (LGreaterEqual (Arg0, HDA_BCLK) && LLessEqual (Arg0, TRIGGER_OUT)) { Store (PID_GPIOCOM3, Local0) Subtract (Arg0, HDA_BCLK, Local1) } /* GPIO Community 4*/ - If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, CL_RST_B))) + If (LGreaterEqual (Arg0, GPP_C0) && LLessEqual (Arg0, CL_RST_B)) { Store (PID_GPIOCOM4, Local0) Subtract (Arg0, GPP_C0, Local1) diff --git a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl index 5b3123d..db2b22c 100644 --- a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl +++ b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl @@ -67,25 +67,25 @@ Method (GADD, 1, NotSerialized) { /* GPIO Community 0 */ - If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GSPI1_CLK_LOOPBK))) + If (LGreaterEqual (Arg0, GPP_A0) && LLessEqual (Arg0, GSPI1_CLK_LOOPBK)) { Store (PID_GPIOCOM0, Local0) Subtract (Arg0, GPP_A0, Local1) } /* GPIO Community 1 */ - If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, vSSP2_RXD))) + If (LGreaterEqual (Arg0, GPP_C0) && LLessEqual (Arg0, vSSP2_RXD)) { Store (PID_GPIOCOM1, Local0) Subtract (Arg0, GPP_C0, Local1) } /* GPIO Community 3*/ - If (LAnd (LGreaterEqual (Arg0, GPP_K0), LLessEqual (Arg0, SPI0_CLK_LOOPBK))) + If (LGreaterEqual (Arg0, GPP_K0) && LLessEqual (Arg0, SPI0_CLK_LOOPBK)) { Store (PID_GPIOCOM3, Local0) Subtract (Arg0, GPP_K0, Local1) } /* GPIO Community 4*/ - If (LAnd (LGreaterEqual (Arg0, HDACPU_SDI), LLessEqual (Arg0, GPP_J11))) + If (LGreaterEqual (Arg0, HDACPU_SDI) && LLessEqual (Arg0, GPP_J11)) { Store (PID_GPIOCOM4, Local0) Subtract (Arg0, GPP_I0, Local1) diff --git a/src/soc/intel/cannonlake/acpi/pch_hda.asl b/src/soc/intel/cannonlake/acpi/pch_hda.asl index f292901..db2d664 100644 --- a/src/soc/intel/cannonlake/acpi/pch_hda.asl +++ b/src/soc/intel/cannonlake/acpi/pch_hda.asl @@ -36,9 +36,7 @@ * NHLT Query only supported for revision 1 and * if NHLT address and length are set in NVS. */ - If (LAnd (LEqual (Arg1, One), - LAnd (LNotEqual (NHLA, Zero), - LNotEqual (NHLL, Zero)))) { + If (LEqual (Arg1, One) && LNotEqual (NHLA, Zero) && LNotEqual (NHLL, Zero)) { Return (Buffer (One) { 0x03 }) } Else { Return (Buffer (One) { 0x01 }) -- To view, visit https://review.coreboot.org/c/coreboot/+/60468 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I259bd218ac3f786cef6e05386f6dc55ccaf6b911 Gerrit-Change-Number: 60468 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/apollolake/acpi: Replace LAnd() with ASL 2.0 syntax
by Felix Singer (Code Review) 30 Dec '21

30 Dec '21

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60466 ) Change subject: soc/intel/apollolake/acpi: Replace LAnd() with ASL 2.0 syntax ...................................................................... soc/intel/apollolake/acpi: Replace LAnd() with ASL 2.0 syntax Replace `LAnd (a, b)` with `a && b`. Change-Id: I4bbbc4888fc134b3862bb956b2ee17a72f282584 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60466 Reviewed-by: HAOUAS Elyes <ehaouas(a)noos.fr> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/apollolake/acpi/pch_hda.asl M src/soc/intel/apollolake/acpi/pcie_port.asl M src/soc/intel/apollolake/acpi/scs.asl 3 files changed, 5 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved diff --git a/src/soc/intel/apollolake/acpi/pch_hda.asl b/src/soc/intel/apollolake/acpi/pch_hda.asl index c3f862e..6c9a14a 100644 --- a/src/soc/intel/apollolake/acpi/pch_hda.asl +++ b/src/soc/intel/apollolake/acpi/pch_hda.asl @@ -39,9 +39,7 @@ * NHLT Query only supported for revision 1 and * if NHLT address and length are set in NVS. */ - If (LAnd (LEqual (Arg1, One), - LAnd (LNotEqual (NHLA, Zero), - LNotEqual (NHLL, Zero)))) { + If (LEqual (Arg1, One) && LNotEqual (NHLA, Zero) && LNotEqual (NHLL, Zero)) { Return (Buffer (One) { 0x03 }) } Else { diff --git a/src/soc/intel/apollolake/acpi/pcie_port.asl b/src/soc/intel/apollolake/acpi/pcie_port.asl index f0f49f3..710051b 100644 --- a/src/soc/intel/apollolake/acpi/pcie_port.asl +++ b/src/soc/intel/apollolake/acpi/pcie_port.asl @@ -49,7 +49,7 @@ Method (_ON, 0, Serialized) { - If (LAnd (LEqual (PDST, 1), LNotEqual (\PRT0, 0))) { + If (LEqual (PDST, 1) && LNotEqual (\PRT0, 0)) { /* Enter this condition if device * is connected */ @@ -83,7 +83,7 @@ Method (_OFF, 0, Serialized) { /* Set L23_Rdy Entry Request (L23ER) */ - If (LAnd (LEqual (PDST, 1), LNotEqual (\PRT0, 0))) { + If (LEqual (PDST, 1) && LNotEqual (\PRT0, 0)) { /* enter this condition if device * is connected */ diff --git a/src/soc/intel/apollolake/acpi/scs.asl b/src/soc/intel/apollolake/acpi/scs.asl index 1ee70ad..a5a1f06 100644 --- a/src/soc/intel/apollolake/acpi/scs.asl +++ b/src/soc/intel/apollolake/acpi/scs.asl @@ -118,7 +118,7 @@ Method (_INI, 0) { /* Check SDCard CD port is valid */ - If (LAnd (LNotEqual (\SCDP, 0), LNotEqual (\SCDO, 0) )) + If (LNotEqual (\SCDP, 0) && LNotEqual (\SCDO, 0)) { /* Store DW0 address of SD_CD */ Store (GDW0 (\SCDP, \SCDO), SCD0) @@ -133,7 +133,7 @@ Method (_PS0, 0, NotSerialized) { /* Check SDCard CD port is valid */ - If (LAnd (LNotEqual (\SCDP, 0), LNotEqual (\SCDO, 0) )) + If (LNotEqual (\SCDP, 0) && LNotEqual (\SCDO, 0)) { /* Store DW0 into local0 to get rxstate of GPIO */ Store (\_SB.GPC0 (SCD0), Local0) -- To view, visit https://review.coreboot.org/c/coreboot/+/60466 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4bbbc4888fc134b3862bb956b2ee17a72f282584 Gerrit-Change-Number: 60466 Gerrit-PatchSet: 5 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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coreboot-gerrit December 2021