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Change subject: mb/google/corsola: Add NOR-Flash support
......................................................................
mb/google/corsola: Add NOR-Flash support
Add NOR-Flash drivers to pass verification of flash at verstage.
TEST=boot to romstage
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: Iee3dd336632b0cf998f5f7c1d118e01e8270e815
---
M src/mainboard/google/corsola/Kconfig
M src/mainboard/google/corsola/bootblock.c
2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/58838/4
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Change subject: Documentation/coding_style.md: Avoid weakly linked symbols
......................................................................
Documentation/coding_style.md: Avoid weakly linked symbols
Change-Id: If70d38c5c646c1e8365bb16d3292cebb2787eba2
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
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M Documentation/contributing/coding_style.md
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58934 )
Change subject: Documentation/coding_style.md: Avoid weakly linked symbols
......................................................................
Patch Set 1:
(2 comments)
File Documentation/contributing/coding_style.md:
https://review.coreboot.org/c/coreboot/+/58934/comment/6b600385_8e4a5fc2
PS1, Line 964: ---------------
> Please underline the whole string.
Done
https://review.coreboot.org/c/coreboot/+/58934/comment/d964aea6_4808c912
PS1, Line 967: a stubs
> stubs
Done
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Change subject: Documentation/coding_style.md: Avoid weakly linked symbols
......................................................................
Documentation/coding_style.md: Avoid weakly linked symbols
Change-Id: If70d38c5c646c1e8365bb16d3292cebb2787eba2
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Documentation/contributing/coding_style.md
1 file changed, 10 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/58934/1
diff --git a/Documentation/contributing/coding_style.md b/Documentation/contributing/coding_style.md
index e3c92af..e32c83c 100644
--- a/Documentation/contributing/coding_style.md
+++ b/Documentation/contributing/coding_style.md
@@ -960,6 +960,16 @@
: /* outputs */ : /* inputs */ : /* clobbers */);
```
+Weakly linked symbols
+---------------
+
+Weakly linked symbols should generally be avoided if possible. Weakly linked
+symbols like functions, which are often just a stubs, result in runtime
+problems due to the lack of a proper implementation, where they could
+otherwise be caught at compiletime. When calling functions in common code
+that might not be implemented by all platforms, it is better to guard the
+call with a conditional using a Kconfig parameter.
+
References
----------
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Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58933 )
Change subject: Documentation/acpi/gpio.md: Update implementation details
......................................................................
Documentation/acpi/gpio.md: Update implementation details
The weak functions were removed in bce7458 "acpi/acpigen.c: Remove weak gpio definition".
Change-Id: Ia6e51698d6209fbf4f59b7fbc988a1aa696e366f
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Documentation/acpi/gpio.md
1 file changed, 0 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/58933/1
diff --git a/Documentation/acpi/gpio.md b/Documentation/acpi/gpio.md
index 470a55f..2d38f99 100644
--- a/Documentation/acpi/gpio.md
+++ b/Documentation/acpi/gpio.md
@@ -84,15 +84,6 @@
## Implementation Details
-ACPI library in coreboot will provide weak definitions for all the
-above functions with error messages indicating that these functions
-are being used. This allows drivers to conditionally make use of GPIOs
-based on device-tree entries or any other config option. It is
-recommended that the SoC code in coreboot should provide
-implementations of all the above functions generating ACPI AML code
-irrespective of them being used in any driver. This allows mainboards
-to use any drivers and take advantage of this common infrastructure.
-
Platforms are restricted to using Local5, Local6 and Local7 variables
only in implementations of the above functions. Any AML methods called
by the above functions do not have any such restrictions on use of
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Change subject: mb/google/dedede/var/bugzzy: Update charger performance control table
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58840/comment/99fec89c_964a009c
PS1, Line 9: Update charger performance control table of DPTF for bugzzy.
Please amend the message, and document where you got the values from.
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Change subject: spd: Add new LP5 parts and generate SPDs
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58929/comment/2e7a07dc_0fce977b
PS2, Line 12: MT62F512M32D2DR-031 WT:B
: MT62F1G32D4DR-031 WT:B
: H9JCNNNCP3MLYR-N6E
Please add the vendors.
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Change subject: soc/mediatek/mt8186: Add a stub implementation of the MT8186 SoC
......................................................................
Patch Set 10:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58640/comment/80b3681c_ca1081db
PS2, Line 10:
> I have added these comments for each module.
Thank you for addressing my concers.
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Change subject: mb/google/brya/var/felwinter: Correct typeC EC mux port
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58930/comment/73b58132_67eedb07
PS1, Line 9: is used
> uses?
Done
https://review.coreboot.org/c/coreboot/+/58930/comment/f11ce6f3_0594cfcc
PS1, Line 9: Type C port2 is used EC mux port0.
> … as per schematics?
Done
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