coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder
by Rex-BC Chen (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Hung-Te Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58935 ) Change subject: soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/58935/comment/aed44b8f_4f4125af PS1, Line 9: Add NOR-Flash GPIO setting in mt8186/spi.c. > What about […] Done File src/soc/mediatek/mt8186/spi.c: https://review.coreboot.org/c/coreboot/+/58935/comment/5d958871_fd5d43ae PS1, Line 23: /* GPIO 36 ~ 39 */ > /* GPIO 36 ~ 39 */ […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58935 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I285ec64ace8b72a48ef1d481d366bd67cb9b0337 Gerrit-Change-Number: 58935 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Thu, 04 Nov 2021 10:21:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder
by Rex-BC Chen (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Rex-BC Chen. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58935 to look at the new patch set (#2). Change subject: soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder ...................................................................... soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder The NOR-Flash can be configured on SPI0 or TDM-RX GPIOs so we have to provide an init function in SoC for the mainboard to select right config. TEST=boot to romstage BUG=b:202871018 Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I285ec64ace8b72a48ef1d481d366bd67cb9b0337 --- M src/soc/mediatek/mt8186/include/soc/spi.h M src/soc/mediatek/mt8186/spi.c 2 files changed, 47 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/58935/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58935 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I285ec64ace8b72a48ef1d481d366bd67cb9b0337 Gerrit-Change-Number: 58935 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder
by Hung-Te Lin (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Rex-BC Chen. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58935 ) Change subject: soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/58935/comment/d5c01d91_04a7a7d9 PS1, Line 9: Add NOR-Flash GPIO setting in mt8186/spi.c. What about The NOR-Flash can be configured on SPI0 or TDM-RX GPIOs so we have to provide an init function in SoC for the mainboard to select right config. -- To view, visit https://review.coreboot.org/c/coreboot/+/58935 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I285ec64ace8b72a48ef1d481d366bd67cb9b0337 Gerrit-Change-Number: 58935 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 04 Nov 2021 10:06:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder
by Hung-Te Lin (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Rex-BC Chen. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58935 ) Change subject: soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder ...................................................................... Patch Set 1: (1 comment) File src/soc/mediatek/mt8186/spi.c: https://review.coreboot.org/c/coreboot/+/58935/comment/9d668118_7d703d10 PS1, Line 23: /* GPIO 36 ~ 39 */ /* GPIO 36 ~ 39 */ [SPI_NOR_GPIO_SET0] = { ... }, /* GPIO ... */ [SPI_NOR_GPIO_SET1] = { ... }, -- To view, visit https://review.coreboot.org/c/coreboot/+/58935 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I285ec64ace8b72a48ef1d481d366bd67cb9b0337 Gerrit-Change-Number: 58935 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 04 Nov 2021 10:04:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/coding_style.md: Avoid weakly linked symbols
by Angel Pons (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Paul Menzel, Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58934 ) Change subject: Documentation/coding_style.md: Avoid weakly linked symbols ...................................................................... Patch Set 2: (2 comments) File Documentation/contributing/coding_style.md: https://review.coreboot.org/c/coreboot/+/58934/comment/b118fcc1_8e0bd5ea PS2, Line 969: When calling functions in common code : that might not be implemented by all platforms If a function in common code isn't implemented by all platforms, is it still "common code"? https://review.coreboot.org/c/coreboot/+/58934/comment/647cd8fa_5305249f PS2, Line 971: parameter option -- To view, visit https://review.coreboot.org/c/coreboot/+/58934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If70d38c5c646c1e8365bb16d3292cebb2787eba2 Gerrit-Change-Number: 58934 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Hung-Te Lin <hungte(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 04 Nov 2021 09:57:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Enable and initialize EINT
by Yu-Ping Wu (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58938 ) Change subject: soc/mediatek/mt8186: Enable and initialize EINT ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58938 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84946c2c74dd233419cb94f013a42c734363baf7 Gerrit-Change-Number: 58938 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 04 Nov 2021 09:43:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/siemens/mc_ehl: Disable HECI #2 device
by Mario Scheithauer (Code Review) 04 Nov '21

04 Nov '21

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58940 ) Change subject: mb/siemens/mc_ehl: Disable HECI #2 device ...................................................................... mb/siemens/mc_ehl: Disable HECI #2 device HECI #2 is not used for CSE communication. Therefore, it is not necessary to set the parameter 'Heci2Enable' in devicetree. Change-Id: I7012e4d877a464699727ca775af3f9965e0602e9 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 2 files changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/58940/1 diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb index be98a15..d6c6788 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb @@ -18,7 +18,6 @@ # FSP configuration register "SaGv" = "SaGv_Disabled" register "SmbusEnable" = "1" - register "Heci2Enable" = "1" # Enable IBECC for the complete memory register "ibecc" = "{ diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 67ff3d0..39789be 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -18,7 +18,6 @@ # FSP configuration register "SaGv" = "SaGv_Disabled" register "SmbusEnable" = "1" - register "Heci2Enable" = "1" # Enable IBECC for the complete memory register "ibecc" = "{ -- To view, visit https://review.coreboot.org/c/coreboot/+/58940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7012e4d877a464699727ca775af3f9965e0602e9 Gerrit-Change-Number: 58940 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek/mt8186: Add timer support
by Yu-Ping Wu (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58937 ) Change subject: soc/mediatek/mt8186: Add timer support ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58937 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6524e4dec4cbe7f7eb75a7940c329416559a03c8 Gerrit-Change-Number: 58937 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 04 Nov 2021 09:43:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Add PLL and clock init support
by Yu-Ping Wu (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58936 ) Change subject: soc/mediatek/mt8186: Add PLL and clock init support ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58936 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id46d0708e7ba0c1a4043a5dce33ef69421cb59c5 Gerrit-Change-Number: 58936 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Chun-Jie Chen <chun-jie.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 04 Nov 2021 09:42:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: Add NOR-Flash support
by Yu-Ping Wu (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Felix Held. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58838 ) Change subject: mb/google/corsola: Add NOR-Flash support ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iee3dd336632b0cf998f5f7c1d118e01e8270e815 Gerrit-Change-Number: 58838 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 04 Nov 2021 09:42:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2021