coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: amdfwtool: Add ISH header support for A/B recovery layout
by Bao Zheng (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Jason Glenesk, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57747 to look at the new patch set (#19). Change subject: amdfwtool: Add ISH header support for A/B recovery layout ...................................................................... amdfwtool: Add ISH header support for A/B recovery layout ISH is newly for Mendocino. The rom layout for A/B recovery with ISH: EFS -> PSP L1 0x48 -> PSP L2 A -> ISH A -> BIOS L2 A 0x4A -> PSP L2 B -> ISH B -> BIOS L2 B Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/Makefile M util/amdfwtool/Makefile.inc M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h 4 files changed, 74 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/57747/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/57747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Gerrit-Change-Number: 57747 Gerrit-PatchSet: 19 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Add support for AMD's BIOS A/B recovery feature
by Bao Zheng (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Bao Zheng, Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Zheng Bao. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56773 to look at the new patch set (#27). Change subject: amdfwtool: Add support for AMD's BIOS A/B recovery feature ...................................................................... amdfwtool: Add support for AMD's BIOS A/B recovery feature The rom layout for A/B recovery: EFS -> PSP L1 0x48 -> PSP L2 A -> BIOS L2 A 0x4A -> PSP L2 B -> BIOS L2 B To enable A/B recovery in PSP layout, add "--recovery-ab" to amdfwtool. Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 185 insertions(+), 61 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/56773/27 -- To view, visit https://review.coreboot.org/c/coreboot/+/56773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036 Gerrit-Change-Number: 56773 Gerrit-PatchSet: 27 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Change the definition of level to a bitwise form
by Bao Zheng (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Bao Zheng, Martin Roth, Marshall Dawson, Zheng Bao. Hello Jason Glenesk, build bot (Jenkins), Martin Roth, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58765 to look at the new patch set (#3). Change subject: amdfwtool: Change the definition of level to a bitwise form ...................................................................... amdfwtool: Change the definition of level to a bitwise form Change-Id: Icca393f0d69519cc1c3cb852a11dd7006cf72061 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.h 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/58765/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/58765 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icca393f0d69519cc1c3cb852a11dd7006cf72061 Gerrit-Change-Number: 58765 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Pack out-of-bounds check into a function and move
by Bao Zheng (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Bao Zheng, Martin Roth, Marshall Dawson, Zheng Bao. Hello Jason Glenesk, build bot (Jenkins), Martin Roth, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58764 to look at the new patch set (#3). Change subject: amdfwtool: Pack out-of-bounds check into a function and move ...................................................................... amdfwtool: Pack out-of-bounds check into a function and move Check the FWs number limit before access the new entry. Change-Id: I71117d1c817c0b6ddaea4ea47aea91672cc6d55a Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 14 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/58764/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/58764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71117d1c817c0b6ddaea4ea47aea91672cc6d55a Gerrit-Change-Number: 58764 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/siemens/mc_ehl: Disable PMC low power modes
by Patrick Georgi (Code Review) 04 Nov '21

04 Nov '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58895 ) Change subject: mb/siemens/mc_ehl: Disable PMC low power modes ...................................................................... mb/siemens/mc_ehl: Disable PMC low power modes All the mainboard variants of mc_ehl do not use the external switches for the bypass rails. Disable the matching UPDs and all the low power modes of the PMC. Change-Id: I08f4effe5c4d5845bed01dfe1bd1251c58012b7f Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58895 Reviewed-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> Reviewed-by: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/siemens/mc_ehl/mainboard.c 1 file changed, 5 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Mario Scheithauer: Looks good to me, approved Lean Sheng Tan: Looks good to me, approved diff --git a/src/mainboard/siemens/mc_ehl/mainboard.c b/src/mainboard/siemens/mc_ehl/mainboard.c index fc03115..5c8f584 100644 --- a/src/mainboard/siemens/mc_ehl/mainboard.c +++ b/src/mainboard/siemens/mc_ehl/mainboard.c @@ -125,6 +125,11 @@ /* Disable P-States */ params->MaxRatio = 0; + + /* Disable PMC low power modes */ + params->PmcLpmS0ixSubStateEnableMask = 0; + params->PmcV1p05PhyExtFetControlEn = 0; + params->PmcV1p05IsExtFetControlEn = 0; } static void mainboard_init(void *chip_info) -- To view, visit https://review.coreboot.org/c/coreboot/+/58895 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08f4effe5c4d5845bed01dfe1bd1251c58012b7f Gerrit-Change-Number: 58895 Gerrit-PatchSet: 3 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/siemens/mc_ehl: Disable all P-States
by Patrick Georgi (Code Review) 04 Nov '21

04 Nov '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58894 ) Change subject: mb/siemens/mc_ehl: Disable all P-States ...................................................................... mb/siemens/mc_ehl: Disable all P-States In order to get a reliable real-time performance disable all P-States for all mc_ehl based mainboard. Change-Id: I22857cc0f1476483ca82c1c872e4519e4b350ea9 Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58894 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Reviewed-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/mainboard.c 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Mario Scheithauer: Looks good to me, approved Lean Sheng Tan: Looks good to me, approved diff --git a/src/mainboard/siemens/mc_ehl/mainboard.c b/src/mainboard/siemens/mc_ehl/mainboard.c index eff2d21..fc03115 100644 --- a/src/mainboard/siemens/mc_ehl/mainboard.c +++ b/src/mainboard/siemens/mc_ehl/mainboard.c @@ -122,6 +122,9 @@ /* Set maximum package C-state to PkgC0C1 */ params->PkgCStateLimit = 0; + + /* Disable P-States */ + params->MaxRatio = 0; } static void mainboard_init(void *chip_info) -- To view, visit https://review.coreboot.org/c/coreboot/+/58894 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22857cc0f1476483ca82c1c872e4519e4b350ea9 Gerrit-Change-Number: 58894 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/siemens/mc_ehl: Disable C-States for CPU and package
by Patrick Georgi (Code Review) 04 Nov '21

04 Nov '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58893 ) Change subject: mb/siemens/mc_ehl: Disable C-States for CPU and package ...................................................................... mb/siemens/mc_ehl: Disable C-States for CPU and package Disable all C-states other than C0/C1 for CPU and package. Change-Id: I2c163f859dab4b0dc02896c70122e993cdd3db72 Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58893 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Reviewed-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/mainboard.c 1 file changed, 10 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Mario Scheithauer: Looks good to me, approved Lean Sheng Tan: Looks good to me, approved diff --git a/src/mainboard/siemens/mc_ehl/mainboard.c b/src/mainboard/siemens/mc_ehl/mainboard.c index e64dbda..eff2d21 100644 --- a/src/mainboard/siemens/mc_ehl/mainboard.c +++ b/src/mainboard/siemens/mc_ehl/mainboard.c @@ -10,6 +10,7 @@ #include <hwilib.h> #include <i210.h> #include <soc/gpio.h> +#include <soc/ramstage.h> #include <string.h> #include <timer.h> #include <timestamp.h> @@ -114,6 +115,15 @@ printk(BIOS_NOTICE, "done!\n"); } +void mainboard_silicon_init_params(FSP_S_CONFIG *params) +{ + /* Disable CPU power states (C-states) */ + params->Cx = 0; + + /* Set maximum package C-state to PkgC0C1 */ + params->PkgCStateLimit = 0; +} + static void mainboard_init(void *chip_info) { const struct pad_config *pads; -- To view, visit https://review.coreboot.org/c/coreboot/+/58893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c163f859dab4b0dc02896c70122e993cdd3db72 Gerrit-Change-Number: 58893 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/denverton_ns: Refactor `detect_num_cpus_via_mch()`
by Angel Pons (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58912 ) Change subject: soc/intel/denverton_ns: Refactor `detect_num_cpus_via_mch()` ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Well, if it does, then CONFIG_MAX_CPUS is wrong. There's a check in `src/cpu/x86/mp_init. […] That being said, I agree that this change in behavior should be accounted for in the commit message. `Refactor` sounds like behavior doesn't change, but this is not the case. Any alternatives? `Simplify` maybe? -- To view, visit https://review.coreboot.org/c/coreboot/+/58912 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae6b16991fcf07c9ad67d2b737e490212b8deedd Gerrit-Change-Number: 58912 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 04 Nov 2021 10:59:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/mp: Use unsigned type for CPU count
by Angel Pons (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Arthur Heymans, Andrey Petrov, Patrick Rudolph, Jason Glenesk, Anjaneya "Reddy" Chagam, Marshall Dawson, Johnny Lin, Christian Walter, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Tim Chu. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58919 ) Change subject: cpu/x86/mp: Use unsigned type for CPU count ...................................................................... Patch Set 1: (1 comment) File src/cpu/x86/mp_init.c: https://review.coreboot.org/c/coreboot/+/58919/comment/906c42d1_46592bd0 PS1, Line 1111: if (mp_state.cpu_count <= 0) { : printk(BIOS_ERR, "Invalid cpu_count: %d\n", mp_state.cpu_count); Revise `cpu_count` retyping consequences, or split it to a separate commit (other variables should also be retyped). -- To view, visit https://review.coreboot.org/c/coreboot/+/58919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifb1e89a7e63952736503b0906dd11a6d38e9cc1c Gerrit-Change-Number: 58919 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 04 Nov 2021 10:57:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/denverton_ns: Refactor `detect_num_cpus_via_mch()`
by Angel Pons (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58912 ) Change subject: soc/intel/denverton_ns: Refactor `detect_num_cpus_via_mch()` ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > looks good to me, but might be worth mentioning that this function might now detect more than CONFIG […] Well, if it does, then CONFIG_MAX_CPUS is wrong. There's a check in `src/cpu/x86/mp_init.c` function `allocate_cpu_devices()`. I think undercounting CPUs is more serious. -- To view, visit https://review.coreboot.org/c/coreboot/+/58912 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae6b16991fcf07c9ad67d2b737e490212b8deedd Gerrit-Change-Number: 58912 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 04 Nov 2021 10:56:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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coreboot-gerrit November 2021