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Change subject: soc/mediatek/mt8186: Add PLL and clock init support
......................................................................
soc/mediatek/mt8186: Add PLL and clock init support
Add PLL and clock init code, frequency meter and APIs for
raising little CPU/CCI frequency.
TEST=build pass
BUG=b:202871018
Signed-off-by: Chun-Jie Chen <chun-jie.chen(a)mediatek.com>
Change-Id: Id46d0708e7ba0c1a4043a5dce33ef69421cb59c5
---
M src/soc/mediatek/mt8186/Makefile.inc
M src/soc/mediatek/mt8186/bootblock.c
A src/soc/mediatek/mt8186/include/soc/infracfg.h
A src/soc/mediatek/mt8186/include/soc/mcucfg.h
M src/soc/mediatek/mt8186/include/soc/pll.h
A src/soc/mediatek/mt8186/pll.c
6 files changed, 2,527 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/58936/6
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Change subject: mb/google/corsola: Add NOR-Flash support
......................................................................
mb/google/corsola: Add NOR-Flash support
Add NOR-Flash drivers to pass verification of flash at verstage.
TEST=boot to romstage
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: Iee3dd336632b0cf998f5f7c1d118e01e8270e815
---
M src/mainboard/google/corsola/Kconfig
M src/mainboard/google/corsola/bootblock.c
2 files changed, 6 insertions(+), 0 deletions(-)
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Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
Change subject: soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder
......................................................................
soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder
The NOR-Flash can be configured on SPI0 or TDM-RX GPIOs so we have to
provide an init function in SoC for the mainboard to select right
configuration.
TEST=boot to romstage
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I285ec64ace8b72a48ef1d481d366bd67cb9b0337
---
M src/soc/mediatek/mt8186/include/soc/spi.h
M src/soc/mediatek/mt8186/spi.c
2 files changed, 47 insertions(+), 0 deletions(-)
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Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58935 )
Change subject: soc/mediatek/mt8186: add NOR-Flash GPIO setting in soc folder
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58935/comment/d45f9f0f_85a3e693
PS3, Line 9: The NOR-Flash can be configured on SPI0 or TDM-RX GPIOs so
: we have to provide an init function in SoC for the mainboard
: to select right config.
> Please use 75 characters per line.
Done
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Change subject: [WIP] util: Add coreboot Configurator
......................................................................
Patch Set 26:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58854/comment/ffed06bf_fdb92b8c
PS26, Line 9: simply
simple
Patchset:
PS26:
Thank you for pushing this upstream. In my opinion, this is big enough to be put into a separate git repository.
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: DO-NOT-SUBMIT: MT8186 Corsola review ToT
......................................................................
DO-NOT-SUBMIT: MT8186 Corsola review ToT
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I53f304822c426417bb58037daa536bfb8dda1db3
---
M README.md
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/58639/16
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Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: soc/mediatek/mt8186: Add SPI driver support
......................................................................
soc/mediatek/mt8186: Add SPI driver support
Add SPI controller drivers.
TEST=build pass
BUG=b:202871018
Signed-off-by: Ruwen Liu <ot_ruwen.liu(a)mediatek.com>
Change-Id: I59a885c4fa31b6e2921698eaa3b97dbdc3144946
---
M src/soc/mediatek/mt8186/Makefile.inc
M src/soc/mediatek/mt8186/include/soc/spi.h
M src/soc/mediatek/mt8186/spi.c
3 files changed, 140 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/58966/2
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Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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Change subject: soc/mediatek/mt8186: Enable and initialize EINT
......................................................................
soc/mediatek/mt8186: Enable and initialize EINT
EINT event mask register is used to mask EINT wakeup source.
All wakeup sources are masked by default. Since most MediaTek SoCs do
not have this design, we can't modify the kernel EINT upstream driver to
solve the issue 'Can't wake using power button (cros_ec) or touchpad'.
So we add a driver here to unmask all wakeup sources.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I84946c2c74dd233419cb94f013a42c734363baf7
---
M src/soc/mediatek/mt8186/Makefile.inc
M src/soc/mediatek/mt8186/bootblock.c
2 files changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/58938/5
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Change subject: soc/mediatek/mt8186: Add timer support
......................................................................
soc/mediatek/mt8186: Add timer support
Add timer drivers to use timer function.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I6524e4dec4cbe7f7eb75a7940c329416559a03c8
---
M src/soc/mediatek/mt8186/Makefile.inc
A src/soc/mediatek/mt8186/timer.c
2 files changed, 20 insertions(+), 4 deletions(-)
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I'd like you to reexamine a change. Please visit
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Change subject: soc/mediatek/mt8186: Add PLL and clock init support
......................................................................
soc/mediatek/mt8186: Add PLL and clock init support
Add PLL and clock init code, frequency meter and APIs for
raising little CPU/CCI frequency.
TEST=build pass
BUG=b:202871018
Signed-off-by: Chun-Jie Chen <chun-jie.chen(a)mediatek.com>
Change-Id: Id46d0708e7ba0c1a4043a5dce33ef69421cb59c5
---
M src/soc/mediatek/mt8186/Makefile.inc
M src/soc/mediatek/mt8186/bootblock.c
A src/soc/mediatek/mt8186/include/soc/infracfg.h
A src/soc/mediatek/mt8186/include/soc/mcucfg.h
M src/soc/mediatek/mt8186/include/soc/pll.h
A src/soc/mediatek/mt8186/pll.c
6 files changed, 2,527 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/58936/5
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